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posted in April 2009
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IMEC links nanophotonics, electronics on chip
News & Analysis  
4/30/2009   Post a comment
Research institute IMEC (Leuven, Belgium) has reported a method to integrate high-speed CMOS electronics with nanophotonic circuitry based on plasmonic effects.
Circuit design platform aims to mitigate substrate noise coupling
News & Analysis  
4/30/2009   Post a comment
Targeting analog, mixed-signal, memory and high-speed I/O designs, Apache Design Solutions has released Totem, an integrated power and noise integrity chip design platform that aims to tackle noise-coupling in mixed-signal SOCs.
Using the PSP Model in CMOS RFIC Design (Part 2 of 2)
Design How-To  
4/30/2009   2 comments
Understand how the Penn State Philips (PSP) transistor model (an alternative to traditional BSIM models) relates to actual device behavior in CMOS RFIC design, and how these models are used in an RF process design kit (PDK)
Cadence Q1 sales fall further
News & Analysis  
4/29/2009   Post a comment
Cadence Design Systems posted a GAAP net loss of $63 million on revenue of $206 million for the first quarter. Revenue declined 9 percent compared to the previous quarter and 24 percent compared with the same period of 2008.
IC design/verification needs management tools
RF & Microwave Designline Blog  
4/29/2009   Post a comment
IC Design Management systems are needed to reduce the time it takes to find, track and fix development bugs; increase design team collaboration; improve designer efficiency; raise product quality, and improve IP reuse.
The next generation in test and debug solution: cJTAG (IEEE 1149.7)
Design How-To  
4/28/2009   Post a comment
IPextreme has productized and now distributes the first cJTAG-IEEE 1149.7 (Compact JTAG) implementation IP core, supporting IEEE 1149.7 class T0"T4 features.
CoWare, Carbon team for ARM IP models
News & Analysis  
4/28/2009   Post a comment
EDA group CoWare Inc. (San Jose, Calif.) and Carbon Design Systems are joining forces to develop implementation-accurate models of ARM IP targeted for CoWare's SystemC-based designs.
Does the EDA industry have a roadmap?
Blog  
4/27/2009   Post a comment
In the technology world, a roadmap is a living document that projects contexts, requirements, and potential solutions into the future. Every industry roadmaps its key technologies, products and markets, for several basic reasons.
Obama to boost federal R&D spending
News & Analysis  
4/27/2009   1 comment
President Barack Obama pledged to raise the level of U.S. federal spending on research and development to more than three percent of the country's gross domestic product. He also named Microsoft chief research and strategy officer Craig Mundie and Google chief executive Eric Schmidt to his board of advisors on science and technology.
Magma's Talus supports Common Power Format
News & Analysis  
4/27/2009   Post a comment
The Talus IC implementation system from Magma Design Automation Inc. has been enhanced to support the Common Power Format (CPF).
Jasper, AMD ink long-term formal verification deal
News & Analysis  
4/27/2009   Post a comment
JasperGold verification technology to be used in AMD design centers worldwide to reduce design risk and meet delivery schedules.
Kontron design wins in Q1 at record level
News & Analysis  
4/27/2009   Post a comment
In the first quarter of the current year, board computer manufacturer Kontron AG (Eching, Germany) continued its upward trend. Despite the crisis, the company raised its sales in comparison to the same quarter last year. Design wins climbed to an all-time high for the company.
Using the PSP Model in CMOS RFIC Design (Part 1 of 2)
Design How-To  
4/27/2009   2 comments
Understand how the Penn State Philips (PSP) transistor model (an alternative to traditional BSIM models) relates to actual device behavior in CMOS RFIC design, and how these models are used in an RF process design kit (PDK)
Xilinx shipping ISE Design Suite 11.1
Product News  
4/27/2009   2 comments
Programmable logic vendor Xilinx is now shipping ISE Design Suite 11.1, described as an FPGA design solution with fully interoperable domain-specific design flows and tool configurations for logic, digital signal processing, embedded processing and system-level design.
Qualcomm to pay Broadcom $891M to settle patent disputes
News & Analysis  
4/27/2009   Post a comment
Qualcomm will pay Broadcom $891 million over four years under the terms of a settlement and multi-year patent agreement announced by the companies.
EDA tools confront the complexity by supporting vehicle design processes
Design How-To  
4/24/2009   Post a comment
With the complexity of automotive design growing as development cycle times simultaneously shrink, vehicle designers need as many new tools as they can find.
Auto design gets modular
Automotive DesignLine Blog  
4/24/2009   Post a comment
Those engineers at the cutting edge of automotive design appear to be taking a page from NASA's Apollo program to land humans on the Moon in the 1960s.
CoWare, ACE and Europractice expand collaboration
News & Analysis  
4/24/2009   Post a comment
EDA company CoWare Inc. (San Jose, Calif.) is collaborating with ACE Associated Compiler Experts BV (Amsterdam, The Netherlands) and the Europractice service (Leuven, Belgium) to offer Processor Designer C-Compiler to European universities and research institutes.
Design tool supports Infineon's TriCore
Product News  
4/23/2009   Post a comment
Development tool vendor iSystem has announced a design tool for Infineon's TriCore 32-bit microcontroller family. The device supports a broad spectrum of functions close to the microcontroller hardware.
Challenging the tool pricing model
Programmable Logic DesignLine Blog  
4/22/2009   4 comments
Is Altium onto something with its new tool pricing?
Ferroelectric gates make transistors nonvolatile
News & Analysis  
4/22/2009   Post a comment
By straining strontium titanate while depositing atomically-thin layers on silicon, researchers hope to create a working ferroelectric transistor that can retain its state even when power is off.
Analog profile: Andrew Beckett
News & Analysis  
4/21/2009   Post a comment
Analog designer and EDA expert Andrew Beckett's career path is testament to the opportunities that abound during the ups and downs of the semiconductor cycle.
No government bailout for poor test planning
Design How-To  
4/21/2009   Post a comment
A technology shift occurred recently that impacted the semiconductor industry — mostly because of changes in silicon fabrication processes that enabled higher performance and integration.
Altium slashes price on 'unified' design tool
Product News  
4/21/2009   1 comment
Australian design tool provider Altium has cut by about 75 percent the price of its Altium Designer, a circuit board design tool which is intended to bring together the traditionally separate worlds of hardware and software design.
Apache offers Totem platform
Product News  
4/21/2009   Post a comment
Apache Design Solutions announced Totem, an integrated power and noise integrity platform for analog, mixed-signal, memory, and high-speed I/O designs.
Samsung adopts IMEC variability-aware modeling for memory
News & Analysis  
4/21/2009   Post a comment
Research institute IMEC (Leuven, Belgium) has transferred an EDA tool for variability-aware modeling (VAM) of memories to Samsung Electronics Co. Ltd. The tool predicts yield loss of SRAMs caused by the process variations of deep-submicron manufacturing processes.
TSMC rolls sign-off flow, RF design kit
Product News  
4/21/2009   Post a comment
Seeking to accelerate the product development process, Taiwan Semiconductor Manufacturing Co. Ltd. (TSMC) is rolling out a one-two punch in the arena: It has unveiled a mixed-signal/RF design kit as well as a foundry-specific integrated sign-off flow.
Food for thought: EDA roadmap?
Blog  
4/20/2009   1 comment
Entire Ph.D. theses have been written on the technology roadmapping process alone, according to guest columnist Andrew B. Kahng. The DAC 2009 chairman explores the path to an EDA roadmap (click on "Guest").
New simulation software release reduces power-electronic prototype iterations
Product News  
4/20/2009   Post a comment
Simulation software specialist, ANSYS, Inc., has released a new version of its Simplorer software, which is part of the Ansoft family of electronic design automation (EDA) products.
Mentor embraces Autosar
Product News  
4/20/2009   Post a comment
EDA software vendor Mentor Graphics has announced a product family that supports the Autosar software standard for automotive electronics. The products are based on the company's existing Eclipse development environment.
In-circuit tester features digital capabilities, low-cost fixturing
Product News  
4/20/2009   Post a comment
Agilent has launched the Medalist i1000D in-circuit test system that bridges a growing solution gap between high-functionality in-circuit testers and low-end manufacturing defects analyzers.
ARM releases IP platform for TSMC's 40-nm process
News & Analysis  
4/20/2009   Post a comment
ARM plc is making available from its website what it says is the industry's most comprehensive IP platform for TSMC's 40-nm G foundry process.
DOCEA Power unveils first ESL tool to optimize dynamic power and thermal behavior
Product News  
4/20/2009   Post a comment
The first electronic system level (ESL) software tool that allows designers to model, simulate and optimize the dynamic power and thermal behaviour of whole complex systems, either on-chip, on-board or with multiple boards is to be previewed by DOCEA Power (Moirans, France) at the Design, Automation & Test in Europe conference in Nice, France, from April 20 to 24, 2009.
Obama names relative unknown as U.S. CTO
News & Analysis  
4/20/2009   3 comments
The United States has its first ever chief technology officer, but Aneesh Chopra is not well known in the electronics industry, and it's not clear whether his focus will be on many of the issues near and dear to the sector.
Protecting software IP: what engineers need to know
Design How-To  
4/20/2009   2 comments
Intellectual property protection and piracy prevention are not new issues for software vendors, but strategies and opinions vary on how best to combat those threats.
Counterpoint: Silicon amnesia
Blog  
4/20/2009   4 comments
Semiconductor technology has enabled our computers, the Internet and 50-mpg cars. Your cellphone has more computational power than the computers did on the Apollo moon lander. Yet in spite of the semiconductor's seminal importance, semiconductor history is neglected by historians as "too new" and by the business media as "old news."
Opinion: Engineers should stage a patent strike
Blog  
4/20/2009   17 comments
Stop filing patents. Refuse to sign employment contracts that give your employer sole title to your inventions. Don't participate in any due diligence efforts on patent portfolios.
Entrepreneurs still key to silicon's progress
News & Analysis  
4/20/2009   Post a comment
A few weeks ago, Moshe Gavrielov, president and chief executive officer of FPGA vendor Xilinx Inc. (San Jose, Calif.), said it was all over: Venture capital would not return to the semiconductor industry--not even after the current recession--because of the heady sums required to launch a chip startup and the more than five-year lag before VC investors see a return.
Samsung SPH-9000: Shrinking PC meets up with new broadband standards
News & Analysis  
4/20/2009   Post a comment
The Samsung SPH-P9000 is a regional gadget, featuring a Windows XP-based PC melded into something closer to an overgrown smart-phone format.
Mentor exec: Seeds of IC recovery being sown
News & Analysis  
4/17/2009   Post a comment
The seeds of a global IC recovery have been sown, a Mentor Graphics executive predicted.
Faster code generation for wireless sensor networks
Design How-To  
4/16/2009   Post a comment
Wireless sensor networks (WSN) have become a hot research topic and show much promise to become a driver of current and future microelectronic technologies. This emerging technology offers exciting potential for numerous application areas including environmental, medical, military, transportation, entertainment and crisis management.
Lower power, high-performance architecture for AMBA 3 AXI On-Chip Interconnect is unveiled
News & Analysis  
4/15/2009   Post a comment
Synopsys, Inc., (Mountain View, California) software and IP specialists for semiconductor design and manufacturing, has enhanced its DesignWare IP for the ARM AMBA 3 AXI interconnect with the industry's first hybrid architecture implementation, enabling dedicated high-performance and shared low-performance channels to be combined within a single AMBA 3 AXI on-chip interconnect.
EMA acquires DesignAdvance
News & Analysis  
4/15/2009   Post a comment
EMA Design Automation has acquired DesignAdvance and all of its intellectual property
European SystemC User Group (ESCUG) meets at DATE
News & Analysis  
4/14/2009   Post a comment
OSCI will hold its annual European SystemC User Group (ESCUG) meeting at DATE.
Cornering Those Corner Case Bugs: Functional Coverage On Multiple Interfaces
Design How-To  
4/14/2009   Post a comment
Functional coverage is probably one of the most important components of constrained random verification strategy.
EVE extends debugging on ZeBu platform
News & Analysis  
4/14/2009   Post a comment
Hardware-software co-verification specialist Emulation and Verification Engineering SA (EVE) has added support for SystemVerilog Assertions, flexible probes, and complete access to all combinational signals at run-time, to its ZeBu (Zero Bugs) emulation systems.
Dafca licenses Stanford's chip anti-tampering IP
News & Analysis  
4/13/2009   Post a comment
SoC validation specialist Dafca Inc. has concluded an IP licensing deal to use GPS signature-related technology developed at Stanford University to help secure the semiconductor supply chain.
ON Semi offers 110-nm ASIC platform
Product News  
4/13/2009   Post a comment
ON Semiconductor has licensed 110-nanometer process technology and associated IP from LSI Corp. to serve as the basis for a new ASIC platform said it offer customers high-density and performance while minimizing non-recurring engineering costs and time-to-market.
Resolving test challenges for emerging wireless designs
Design How-To  
4/12/2009   Post a comment
Understand some of the issues which impact testing of mixed-signal and RF packages
A guy, a gal, a trip
Blog  
4/10/2009   Post a comment
There's a guy out there who calls himself "Harry...the ASIC guy". He's pretty clever and apparently has a good following in the EDA community.
Page 1 / 2   >   >>


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