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Content tagged with Design Tools (EDA)
posted in April 2009
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MIT researchers claim novel pattern exposure
News & Analysis  
4/10/2009   Post a comment
Massachusetts Institute of Technology researchers claim to have made a breakthrough allowing the production of nano-scale patterns much smaller than the wavelength of light used to expose them.
Novellus rolls new ECD process
News & Analysis  
4/10/2009   Post a comment
Fab tool vendor Novellus Systems Inc. has developed a copper electrochemical process said to eliminate defects when scaling to the 32-nm node.
Android set-tops, TVs, VoIP phones are coming
News & Analysis  
4/10/2009   6 comments
Google's Android platform is reaching beyond the cellphone to power set tops, TVs, VoIP phones, Karaoke boxes and digital photo frames.
Google Android will win smartphone OS battle, says poll
News & Analysis  
4/10/2009   2 comments
Despite the current popularity of Apple's iPhone, Google with its Android operating system and platform is set to take the leading position in the smartphone market, according to an EE Times Europe poll.
Agilent's GoldenGate certified for 65/40-nm designs
Product News  
4/9/2009   Post a comment
TSMC has certified the accuracy, performance and compatibility of Agilent's GoldenGate RFIC circuit simulator for baseband designs targeting TSMC's 65LP nmand 40LP nm processes.
Guest Blog: Max The Magnificent
News & Analysis  
4/9/2009   Post a comment
Clive "Max" Maxfield returns (sort of) with a guest blog contribution especially for those who have missed his "off-topic" blogs and bits.
Analyst: Strong IC rebound to start in second half
News & Analysis  
4/9/2009   Post a comment
Spurred by pent-up electronic system demand and increasing average selling prices, the IC market will register double-digit growth in 2010 and 2011 after beginning to recover in the second half of this year, according to market research firm IC Insights.
Viewpoint: Mass GPUs, not CPUs for EDA simulations
News & Analysis  
4/9/2009   2 comments
GPUs, sold in millions to gamers, now have a terrific price/performance ratio for use in EDA simulators.
Startup to show power analysis EDA at DATE
News & Analysis  
4/9/2009   Post a comment
Design-for-power startup company Docea Power SA (Moirans, France) has said it will attend the DATE (Design Automation and Test Europe) exhibition in Nice, France, taking place April 21 to 23, 2009, and exhibit version 1.1. of its ACEplorer software.
Microchip adds security/safety ic design expertise
Product News  
4/9/2009   Post a comment
US based microcontroller and analog specialist, Microchip Technology, has acquired a company that makes asics for security and safety applications.
Four questions on design using social networks
News & Analysis  
4/8/2009   Post a comment
AsusTek and Intel share their experience with WePC.com, an early experiment in how social networks can become an input for the product design process.
'Logic bricks' proposed as simpler IC design elements
News & Analysis  
4/8/2009   Post a comment
Semiconductor Research Corp.'s Focus Center Research Program and Carnegie Mellon University have developed simple design elements called "logic bricks" for use in IC design libraries.
System-in-package startup raises $12 million
News & Analysis  
4/8/2009   Post a comment
Si2 Microsystems Ltd. a system-in-package manufacturer, has raised $12 million from VenturEast and Jafco Asia in a second round of funding.
Are 'primary vendor' deals bad for EDA?
News & Analysis  
4/7/2009   Post a comment
Critics charge that the current fad for customers of Synopsys to consent to public announcements saying they've selected the No. 1 EDA vendor as their primary supplier of design tools is bad for EDA, stifling innovation and hurting overall tool pricing. But are these complaints about a competitor legitimate, or just sour grapes?
IBM Fellow: Moore's Law defunct
News & Analysis  
4/7/2009   6 comments
An IBM researcher says Moore's Law is running out of gas.
Innovative heat sink designs cool "hot" FPGAs
Design How-To  
4/7/2009   Post a comment
While the power dissipated by FPGAs is growing, the space allocated to cool these chips is shrinking. In recent years, makers of thermal management products have introduced a wide array of new heat sinks that provide more cooling in a given volume. This article will help engineers looking for more-powerful heat sinks by describing recent innovations in heat sink design and analyzing their impact on heat sink performance.
British analog design expert scoops top US tech honour
News & Analysis  
4/7/2009   Post a comment
British analog expert and Analog Devices' Technology Fellow Barrie Gilbert was recently elected to the U.S. National Academy of Engineering in recognition of his contributions to the field of analog circuit design.
Converging circuit types demands unified simulation approach
News & Analysis  
4/7/2009   Post a comment
Responding to demand for a simulation tool that can verify custom digital, analog and memory on a single chip, Synopsys has combined its NanoSim, HSIM and XA circuit simulation technologies into one tool - CustomSim.
Fourth quarter EDA revenue down 18%
News & Analysis  
4/7/2009   Post a comment
EDA revenue in the fourth quarter of 2008 totaled $1.32 billion, down 17.7 percent from the fourth quarter of 2007, according to data released by the EDA Consortium Market Statistics Service.
Pyxis Technology raises $3 million
News & Analysis  
4/7/2009   Post a comment
EDA firm Pyxis Technology, Inc. has raised $3 million in financing to accelerate the deployment of its new High-performance Custom (HPC) routing product, NexusRoute-HPC.
Characterizing custom analog blocks in mixed-signal microcontrollers
Design How-To  
4/6/2009   Post a comment
This article describes our use of the Analog FastSPICE circuit simulator (AFS) from Berkeley Design Automation for verifying the design of a crystal oscillator, transistor-level closed-loop PLL simulation, and characterizing a 10-bit, 8-channel ADC.
Mentor updates P&R tool with low-power features
Product News  
4/6/2009   Post a comment
Mentor Graphics Corp. has added new features for low power IC implementation to its place and route platform.
Edison and innovation: Lessons from the master
Blog  
4/6/2009   1 comment
Sarah Miller Caldicott believes she has a new model for reinvigorating U.S. technology innovation: the same one developed by her great-granduncle, Thomas Alva Edison.
Overcome LTE PHY challenges using ESL design
Design How-To  
4/6/2009   Post a comment
Electronic System Level (ESL) design aims to be a comprehensive design and verification methodology for LTE design and this article aims to introduce some of the design challenges that may be encountered in designing the physical layer (PHY) for LTE, while also showing how ESL tools can help create executable specs to help overcome those design challenges.
U.S. high-tech jobs grew again in 2008, says study
News & Analysis  
4/5/2009   Post a comment
Overall U.S. high-tech employment increased in 2008 for the fourth consecutive year, as net job gains in software services and engineering and tech services offset declines in high-tech manufacturing, particularly within the semiconductor industry, according to a study released last week.
Video: Where hardware and software collide
News & Analysis  
4/4/2009   Post a comment
A panel of executives at ESC Silicon Valley talked about the clash of cultures between hardware and software engineers as chipmakers take on the responsibility of developing more embedded software and agreed that a system-level approach has become mandatory.
Software delivery directions
Blog  
4/3/2009   1 comment
The notion of software-as-service (SaaS) in EDA is being brought up again.
edacentrum workshop seeks European EDA networking
News & Analysis  
4/3/2009   Post a comment
Against the background of the economy crisis, Electronic Design Automation researchers are seeking to intensify their pan-European contacts. For this reason, German edacentrum will hold his edaWorkshop together with the Design Technology Conference (DTC) of the European research initiatives Medea+ and Catrene.
Acoustic Echo Cancellation: All you need to know
News & Analysis  
4/3/2009   Post a comment
IP telephony is certainly gaining popularity, but it comes with its own set of problems.
Counterpoint: Meeting with the unexpected
Blog  
4/3/2009   4 comments
At trade shows these days, everyone wants to know the number of attendees. This tends to drown out a somewhat more important issue: the quality of the show. But when we walk into unexpected encounters with people we've never met before at a trade show, we are always reminded of one thing: This is why we travel.
Design trends for connectivity IP at the physical layer
Design How-To  
4/2/2009   Post a comment
With the current demands of high-speed connectivity IP, such as DDR3, PCI Express (PCIe) 3.0 and USB 3.0, both high speed and low power are now required.
ESC panel debates how to spend $1 trillion
News & Analysis  
4/2/2009   Post a comment
During an event at the Embedded Systems Conference (ESC) here, panelists were asked to debate the ''winners and losers'' in the U.S. stimulus package.
Design-for-ebeam firm closes $9 million in funding
News & Analysis  
4/2/2009   Post a comment
Design and software startup D2S said it closed $9 million in Series B funding from investors including Benchmark Capital, DAG Ventures, Advantest and Cadence Design Systems.
Linear motor control without the math
Design How-To  
4/1/2009   3 comments
A new algorithm using only addition and subtraction and no complicated math produces the linear acceleration necessary to run a step motor smoothly.
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Rishabh N. Mahajani, High School Senior and Future Engineer

Future Engineers: Don’t 'Trip Up' on Your College Road Trip
Rishabh N. Mahajani, High School Senior and Future Engineer
1 Comment
A future engineer shares his impressions of a recent tour of top schools and offers advice on making the most of the time-honored tradition of the college road trip.

Max Maxfield

Juggling a Cornucopia of Projects
Max Maxfield
7 comments
I feel like I'm juggling a lot of hobby projects at the moment. The problem is that I can't juggle. Actually, that's not strictly true -- I can juggle ten fine china dinner plates, but ...

Larry Desjardin

Engineers Should Study Finance: 5 Reasons Why
Larry Desjardin
35 comments
I'm a big proponent of engineers learning financial basics. Why? Because engineers are making decisions all the time, in multiple ways. Having a good financial understanding guides these ...

Karen Field

July Cartoon Caption Contest: Let's Talk Some Trash
Karen Field
128 comments
Steve Jobs allegedly got his start by dumpster diving with the Computer Club at Homestead High in the early 1970s.

latest comment mhrackin Where's the "empty bin" link?
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