Is EDA innovating enough? Blog 4/9/2010 5 comments Much has been written and said about the travails of the EDA industry. Some industry leaders are shrinking in size and losing money. The industry as a whole is not growing and prospects are not promising. Part of the problem can be explained by the fact that we are just coming out of one of the worst recessions in history that has impacted most industries. Yet, most observers agree that the industry's struggles can't be explained by the economy alone.
ST licenses Cadence's OrCAD PSpice News & Analysis 4/9/2010 Post a comment European chipmaker STMicroelectronics NV announced it is deploying Cadence's OrCAD PSpice technology to enable its customers to test-drive its analog and power IC product families.
Automotive still a solid opportunity for EDA, says Mentor exec News & Analysis 4/8/2010 1 comment As EDA searches for opportunities to generate more revenues from outside the semiconductor industry, Martin O'Brien, general manager, Integrated Electrical Systems Division of Mentor Graphics Corp., highlighted automotive and said the trend is likely to continue with the advent of hybrid and electric vehicles.
NetFPGA design contest Programmable Logic DesignLine Blog 4/7/2010 Post a comment Stanford University's NetFPGA program is holding a design contest, asking design teams to produce a working implementation employing any hardware and software design methodology and targeting the NetFPGA development platform.
February's poor chip sales: a blip or a sign? News & Analysis 4/7/2010 1 comment Actual global sales of semiconductors was $20.79 billion in February, down 4.9 percent from the actual sales in January of $21.85 billion, according to figures from World Semiconductor Trade Statistics.
TSMC licenses Magma's physical verification tools News & Analysis 4/7/2010 1 comment Taiwan Semiconductor Manufacturing Co. Ltd. (Hsinchu, Taiwan) announced it has deployed Quartz DRC and Quartz LVS from Magma Design Automation Inc. as the physical verification tools for the 65nm integrated sign-off flow (ISF).
Lattice offers service pack for ispLEVER 8.0 Product News 4/7/2010 Post a comment Lattice Semiconductor announced the availability of Service Pack 1 for Version 8.0 of its ispLEVER FPGA design tool suite. According to Lattice, Service Pack 1 is an important update for users of LatticeECP3 FPGAs.
Nano ePrint licenses Infiniscale's modeling tool News & Analysis 4/6/2010 Post a comment Nano ePrint Ltd., a spin off from the University of Manchester in England, announced it has selected the GreenLys modeling tool suite from French EDA startup Infiniscale SA for its organic electronic devices modeling needs.
Analyst raises estimates for Xilinx, Altera News & Analysis 4/6/2010 Post a comment An investment analyst raised revenue estimates for programmable logic vendors Xilinx and Altera, saying both have room for continued near-term growth despite recent concerns over capital expenditure cuts by China's telecommunications companies.
The value and importance of code reviews Design How-To 4/6/2010 Post a comment Did you know that most code reviews are conducted ad-hoc, often exclude key people, and fail to take advantage of available technology? That's according to new research that looks at the state of code reviews.
EUV camp drops ball on metrology News & Analysis 4/5/2010 2 comments During a presentation at the recent SPIE Advanced Microlithography conference here, Bryan Rice, director of lithography at chip making consortium Sematech, literally passed a hat along the front row of the audience.
IBM benchmarks prod microprocessor designers Product News 4/2/2010 Post a comment IBM Research and Intel Research collaborated on a set of benchmarks made publicly available to aid microprocessor designers and to evaluate the winners of a clock synthesis contest at the International Symposium on Physical Design.
Europe backs thermally-aware EDA project News & Analysis 4/1/2010 1 comment Europe's big three chip makers STMicroelectronics, Infineon Technologies and NXP are all taking part in a three-year European collaborative research project to try and improve thermal-awareness and thermal effect modeling within IC design.
Konica Minolta selects EVE's ZeBU Product News 4/1/2010 Post a comment Japan's Konica Minolta Technology Center Inc. announced it has licensed ZeBu emulation platform from EVE SA (Palaiseau, France) to accelerate the validation of its image processing LSI designs.
As data rates begin to move beyond 25 Gbps channels, new problems arise. Getting to 50 Gbps channels might not be possible with the traditional NRZ (2-level) signaling. PAM4 lets data rates double with only a small increase in channel bandwidth by sending two bits per symbol. But, it brings new measurement and analysis problems. Signal integrity sage Ransom Stephens will explain how PAM4 differs from NRZ and what to expect in design, measurement, and signal analysis.
January 2016 Cartoon Caption ContestBob's punishment for missing his deadline was to be tied to his chair tantalizingly close to a disconnected cable, with one hand superglued to his desk and another to his chin, while the pages from his wall calendar were slowly torn away.122 comments