Cadence beats Q1 estimates, promotes exec News & Analysis 4/27/2011 Post a comment Cadence Design Systems reported sales and earnings for its fiscal first quarter that exceeded consensus analyst expectations and announced the promotion of one EDA veteran to replace another that is leaving the company.
MATLAB, Simulink revision features code generation Product News 4/27/2011 Post a comment MathWorks reveals Release 2011a (R2011a) of its MATLAB and Simulink product families offering key code generation products, MATLAB Coder, Simulink Coder, and Embedded Coder as well as 80 other product updates, including Polyspace embedded software verification products.
Scaling a video on demand server Design How-To 4/27/2011 1 comment This article illustrates how to model and simulate an example model of a RTP/RTSP video on demand server using the method, notations and tools provided by CoFluent Design.
Accellera tips IP tagging standard effort News & Analysis 4/27/2011 Post a comment EDA and IP standards body Accellera launched an effort to create a standard for IP tagging—tracking soft IP information which will be automatically added and detectable in the final GDSII database format.
Cadence introduces latest version of Allegro News & Analysis 4/25/2011 Post a comment Cadence Design Systems introduced the latest version of its Allegro PCB and IC packaging technology, delivering new capabilities that the company says provide increases in productivity and predictability across silicon, SoC and system development.
Atmospherics Monitor Design How-To 4/25/2011 9 comments This is a project that I [Max] have wanted to build for ages. It will allow me to tune into the sounds of the heavens. I’ve painstakingly gathered all of the parts and now I’m ready for action…
Mentor dismisses Icahn's board nominees News & Analysis 4/25/2011 Post a comment Mentor Graphics CEO Walden Rhines fired back at billionaire financier Carl Icahn, saying that Icahn is distorting the qualifications of his three nominees to Mentor's board of directors.
Tools spur ECU CAN/LIN communications Design How-To 4/22/2011 Post a comment With the increasing use of in-vehicle networks, the development of automotive electronic control units must not only consider the software requirement, but also the implementation of the embedded software via a data bus such as CAN or LIN.
Icahn letter highlights Mentor CEO's pay News & Analysis 4/22/2011 8 comments Billionaire investor Carl Icahn has written an open letter to shareholders of EDA software licensor Mentor Graphics Corp. attacking the performance of the board, highlighting the CEO's pay and arguing that a board including his nominees need not be focused solely on selling the company.
Xilinx 7 Series FPGAs: User Guide Lite Design How-To 4/19/2011 7 comments This article highlights the capabilities of the new Xilinx 7 series FPGAs, giving potential users the information they need to understand the features of the families.
Next generation component management Design How-To 4/18/2011 Post a comment This whitepaper takes a look at how Altium solves this problem through its Unified Component model, and a new approach to component management that harnesses the power of this model.
Cisco turns the Flip into a Flop Blog 4/14/2011 5 comments I cannot believe it. Just two years after Cisco bought the startup company that created the Flip Video – the most popular video camera in America – they’ve decided to kill it as a product.
ISPD reveals 3-D, maskless-lithography trends News & Analysis 4/13/2011 7 comments Next generation trends in the physical fabrication of semiconductors, including 3-D and maskless lithography, were recently laid out at this year's 20th annual International Symposium on Physical Design in Santa Barbara, Calif.
The incredible shrinking Max Blog 4/13/2011 7 comments I always wondered what it would be like to be six inches tall. I just saw a site that creates custom figurines. These look really tasty – I think it would be mega-cool to have a mini-me on my desk…
Using verification coverage with formal analysis Design How-To 4/13/2011 Post a comment This article looks at what “coverage” means for formal verification tools, and how formal coverage fits into metric-driven verification flows. It discusses formal coverage in terms of three questions: how good are my formal constraints, how good is my proof, and how can I feel confident my verification is complete?
Facilitating at-speed test at RTL (Part 1) Design How-To 4/12/2011 Post a comment This article intends to present basic concepts and issues for at-speed testing, as well as demonstrate the at-speed coverage estimation and diagnosis capability built-in to the SpyGlass-DFT DSM product for RTL designers and test engineers.