Built-in self-test migrates to register-transfer level Product News 5/31/2005 Post a comment Built-in self-test offers high fault coverage for a range of potential defects, but it has been difficult to implement. LogicVision promises to change that this week with its LV2005 release, moving logic and memory BIST insertion up to the register-transfer level.
Data path tools do the math for area savings Product News 5/31/2005 Post a comment New mathematical approaches that promise up to 40 percent savings in silicon area will become available to a broader audience this week, as intellectual-property startup Arithmatica rolls out its first EDA tools.
First wave of IP support washes over FPGA family Product News 5/31/2005 Post a comment Lattice Semiconductor Corp. has released for its recently announced LatticeXP field-programmable gate array (FPGA) family the first set of IP modules that address the needs of the consumer, computing and communications markets.
Mentor vor Übernahme von Aptix News & Analysis 5/27/2005 Post a comment Ein Jahr nachdem der Radid-Prototyping-Anbieter Aptix Konkurs anmelden musste, schickt sich der EDA-Software-Anbieter Mentor Graphics an, die Reste des Technologieunternehmens aufzukaufen.
Simulation software sets power designs in motion Product News 5/26/2005 Post a comment International Rectifier's new web-based simulation tool for three-phase, variable-speed, motor drive inverter circuits simplifies recursive calculations and expands the design support for the company's iMOTION integrated design platform.
Profits, revenue up at Wind River News & Analysis 5/25/2005 Post a comment Wind River Systems reported a GAAP net income of $1.9 million for the first fiscal quarter of 2006, a considerable improvement from the net loss of $3.8 million reported for the year-ago quarter.
Wind River expanding Linux solutions News & Analysis 5/23/2005 Post a comment In a flurry of activity timed to coincide with the company's users conference, device software optimization provider Wind River announced several new products, strategies and alliances.
Design for Manufacturing is Everyone's Business Design How-To 5/19/2005 Post a comment To be a viable volume-production item, a chip must exhibit sufficient yield throughout the manufacturing chain, including fabrication, packaging and test. Just as chip designers must design their products such that they can be successfully tested, they must also take into consideration factors that will maximize the chip's yield after all the relevant manufacturing operations. In this feature article, Jim Lipman discusses design for manufacturing (DFM).
Neue Simulations-Funktionen für SystemVerilog Product News 5/18/2005 Post a comment Mit Mentor Graphics und Axiom Design Automation bringen diese Woche gleich zwei Anbieter von Verifizierungssoftware eine neue Simulationstechnologie, die den aufkommenden Sprachstandard SystemVerilog unterstützt.
As data rates begin to move beyond 25 Gbps channels, new problems arise. Getting to 50 Gbps channels might not be possible with the traditional NRZ (2-level) signaling. PAM4 lets data rates double with only a small increase in channel bandwidth by sending two bits per symbol. But, it brings new measurement and analysis problems. Signal integrity sage Ransom Stephens will explain how PAM4 differs from NRZ and what to expect in design, measurement, and signal analysis.
January 2016 Cartoon Caption ContestBob's punishment for missing his deadline was to be tied to his chair tantalizingly close to a disconnected cable, with one hand superglued to his desk and another to his chin, while the pages from his wall calendar were slowly torn away.122 comments