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posted in May 2008
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Xilinx responds to Altera's FPGA benchmarks
Programmable Logic DesignLine Blog  
5/30/2008   2 comments
The folks at Xilinx say that they've re-run the tests with different tool settings and, overall, the Xilinx software solution with Synplify Pro and ISE 10.1 dominates.
2008 WallCharts from Gary Smith are available
Blog  
5/29/2008   Post a comment
Gary Smith has just published the WallCharts for 2008. These reference documents give the reader a complete list of all the EDA vendors by application area.
EDA Vendors Reference Charts
Product News  
5/29/2008   1 comment
2008 WallCharts by Gary Smith identify EDA vendors by market segment.
Additional info with regard to the latest in Altium's unified electronics design solution
Product News  
5/28/2008   Post a comment
Electronics design decisions linked in real time to the MCAD world; guided routing; custom instruments to test designs inside FPGAs; and much more...
Altium solves 25 years of electronics design pain
Design How-To  
5/28/2008   Post a comment
At last! Electronics designers and mechanical designers can collaborate in real time: designers in both worlds can link and review designs dynamically.
Simulation challenge: Mimicking Earth and the brain
News & Analysis  
5/28/2008   Post a comment
Simulating the human brain and the Earth's climate are two of the most important challenges in science, according to Robert Bishop, chairman of the advisory board to the Blue Brain Project.
DAC targets 45-nm design
News & Analysis  
5/28/2008   Post a comment
A special Management Day session during the upcoming Design Automation Conference will again tackle the toughest chip design issues using 45-nm process technology.
A model transistor
News & Analysis  
5/27/2008   Post a comment
Researchers working on the EU-funded Robuspic project say they have developed accurate behavioural models that will help semiconductor companies design more efficient power transistors.
ESL Methods for Optimizing a Multi-media Phone Chip
Design How-To  
5/27/2008   1 comment
This article describes experiences with the adoption of ESL for optimizing the architecture of a multi-media cellular phone platform.
SpringSoft completes merger with Novas and acquires four more companies.
News & Analysis  
5/27/2008   Post a comment
Largest Asian EDA company consolidates global channel and deepens portfolio of specialized EDA technology to drive growth.
DSP/FPGA co-processing demos 20X acceleration using SW-to-HW design flow
Product News  
5/27/2008   Post a comment
Impulse C-to-FPGA compiler and 3L Diamond tools link to accelerate signal processing in a hybrid DSP/FPGA multiprocessing system.
Synopsys Unveils New IC Compiler Router
Product News  
5/27/2008   Post a comment
Synopsys, Inc. unveiled Zroute, a new multi-threaded router fully integrated into IC Compiler.
Analog design expertise is rare, valuable
News & Analysis  
5/27/2008   1 comment
An enduring shortage of analog engineers--that may be getting worse rather than better--is requiring digital chip powerhouses to redouble their efforts to recruit and groom analog engineers.
Springsoft Acquires More Technology And Channel Companies
News & Analysis  
5/27/2008   Post a comment
Springsoft announced the completion of its merger with Novas Software, Inc., the acquisition of four additional EDA companies.
Design Challenges Drive Need for New Routing Architecture
Design How-To  
5/27/2008   Post a comment
At the latest technology nodes, there is limited room to optimize post routing. Simultaneous optimization of yield is becoming increasingly important in order to achieve high Quality of Results.
EVE unleashes DW-FPGA for FPGA synthesis
Product News  
5/27/2008   Post a comment
EVE says that its DW-FPGA DesignWare component library is available for use with most popular FPGA synthesis software.
Infiniscale unveils analog DFY tool
News & Analysis  
5/27/2008   Post a comment
On the eve of Design Automation Conference in Anaheim, California, French EDA startup Infiniscale SA unveiled a model-based parametrical yield optimizer that is claimed to allow analog design-for-yield (DFY).
Verify the design of two-way radio
Design How-To  
5/26/2008   Post a comment
This article describes how a design team at Motorola used the Berkeley Design Automation Analog FastSPICE circuit simulator to characterize complex analog/RF blocks for two-way radio and related communication devices.
Embedded MATLAB, part 2: System-level integration and verification
Design How-To  
5/25/2008   Post a comment
Part 2 shows how to integrate the generated C code into Simulink models for system-level design and verification.
All-in-one multi-touch development kit
Product News  
5/23/2008   Post a comment
The new SMK 15.4 development kit comes with everything needed for a high-performance, one-stop multi-touch system, including a wide-screen TFT LCD display.
Mentor Reports First Quarter Loss
News & Analysis  
5/23/2008   Post a comment
Mentor Graphics Corp. posted a quarterly loss and said near-term results would continue to be below expectations.
CoFluent readies V3 of ESL modeling, simulation tool
News & Analysis  
5/23/2008   Post a comment
As part of the pre-DAC drum roll of product announcements, French Electronic System Level (ESL) company CoFluent Design has unveiled version 3.0 of CoFluent Studio, an ESL graphical modeling and simulation toolset leveraging Eclipse technologies. Its availability is expected in the fourth quarter of 2008.
Dynamic Voltage Droops & Total Power Integrity
Design How-To  
5/23/2008   Post a comment
This article sheds light on key differences such as voltage droops and noise wave propagation resulting from on-chip load interaction with power network impedance and discusses how total power integrity may be rigorously inspected through rapid analyses and physics-based simulations.
The DFM Melting Pot
Blog  
5/22/2008   Post a comment
The DFM market segment is loosing member companies through acquisition. The remain small companies will find it harder to succeed.
Xilinx adds flexible connectivity to low-power Intel in-vehicle infotainment reference design
Product News  
5/21/2008   Post a comment
Xilinx automotive FPGA and connectivity solution enables scalable, flexible infrastructure for rapid infotainment system development.
Spatial brings 3D to EDA world
Product News  
5/21/2008   1 comment
Spatial Corp., an operating division of Dassault Systèmes specializing in 3D components for technical applications, has introduced what it claims to be the first integrated suite aimed at accelerating EDA 3D analysis development.
Forte Releases Cynthesizer 3.4
Product News  
5/21/2008   Post a comment
Cynthesizer 3.4 integrates with Synopsys' tools for Power management. Adds interface generation and ECO capabilitries as well.
Tool enhanced to support IEC61131-3 programming language
Product News  
5/20/2008   Post a comment
The advanced ADK 6.0 software from ACS Motion Control provides fully variable mapping that enables flexible bi-directional interfacing, mutual synchronization, and functionality exchange between ACSPL+ and IEC 61131-3 programs.
Synopsys announces immediate support for Altera Stratix IV FPGAs
Product News  
5/20/2008   Post a comment
Synopsys says its synthesis software is optimized for Stratix IV devices; enables superior area quality of results and low power consumption.
Apache Announces Sentinel-PI
Product News  
5/20/2008   Post a comment
Apache Design Solutions has announced Sentinel-PI, an integrated chip-package-system co-design and co-analysis solution for power integrity.
Magma Introduces Hydra
Product News  
5/20/2008   Post a comment
Hydra takes timing, power, congestion and area into consideration and generates an implementation-ready floorplan.
Static Checks for Power Management at RTL
Design How-To  
5/20/2008   Post a comment
Static checks offer an excellent alternative to verification techniques that focus solely on dynamic methods.
Altera's Quartus II software Version 8.0 supports 40nm Stratix IV FPGAs
Product News  
5/19/2008   Post a comment
Performance, logic utilization, and compile-time advantages provided by Altera's Quartus II design software enables fast time-to-market and efficient team-based design.
Mentor's tools support Altera's 40nm Stratix IV FPGA family
Product News  
5/19/2008   Post a comment
Mentor says its Precision Synthesis and Catapult C Synthesis tools support Altera's new 40nm Stratix IV FPGA family.
Design kit gives access to high voltage process technology
Product News  
5/19/2008   Post a comment
Fraunhofer Institute for Integrated Circuits (IIS) and Austriamicrosystems Full Service Foundry business unit jointly announced the availability of an updated process design kit for Austriamicrosystems' 0.35um high voltage CMOS process.
De Geus: EDA has to be rethought
News & Analysis  
5/19/2008   Post a comment
Seeing where the EDA industry is going is relatively easy. The difficult bit is laying out an EDA offering at the right time, when customers are ready to take it up, according to Aart de Geus, chairman and CEO of the Mountain View based company. And right now, everything in the EDA space has to be rethought, according to de Geus.
Embedded MATLAB, part 1: From MATLAB to embedded C
Design How-To  
5/19/2008   1 comment
Here's how to turn MATLAB code into efficient, embeddable C code. Topics covered include the Embedded MATLAB language subset, coding practices, and The MathWorks's M-to-C tools.
eSOL releases iPod connectivity support for its USB host driver
Product News  
5/18/2008   Post a comment
eSOL has added an isochronous transfer mode and an audio class driver to its PrUSB /Host product, enabling USB host-based products such as car infotainment systems and navigation systems to receive audio streaming in real time over the standard USB connection from portable music players such as iPod from Apple.
Preserving The Intent Of Timing Constraints
Design How-To  
5/17/2008   Post a comment
Constraints Management: Approaches and techniques for preserving the intent of timing constraints throughout the design flow
Legislation Drives The Move To Low Power Design
News & Analysis  
5/16/2008   Post a comment
The latest legislation and environmental concerns in Europe are driving more and more emphasis on saving energy in many different ways and will effect any equipment sold in the region.
Visual Enhancement Engine (VEE) evaluation module from QuickLogic
Product News  
5/16/2008   Post a comment
QuickLogic's VEE Evaluation Module seamlessly integrates into the display path of handheld and portable electronics without modification to existing architecture.
ChipVision raises $4.5 million in Round B
News & Analysis  
5/16/2008   Post a comment
EDA tools specialist ChipVision Design Systems (Oldenburg, Germany) has raised $4.5 million in a Series B round led by Target Partners and BayTech Venture Capital, both of Munich, Germany.
Asset attests to embedded-test structures
News & Analysis  
5/15/2008   Post a comment
As a natural extension of trends in the test and measurement business, the electronics industry is moving toward embedded instrumentation. Leading this movement is Asset InterTech Inc., dedicated to the development of IEEE 1149.1 tools.
Mentor Graphics Acquires Ponte Solutions
News & Analysis  
5/15/2008   Post a comment
Mentor Graphics has acquired Ponte Solutions.
For Sale on Lake Oswego
Blog  
5/15/2008   Post a comment
Some executive relocation packages are better than others.
MATLAB toolbox boasts 1300+ math routines
Product News  
5/14/2008   Post a comment
The Numerical Algorithms Group (NAG) has released a new toolbox with 1,300+ functions derived from its extensive mathematical function library.
Enhanced Carbon Model Studio Released
Product News  
5/14/2008   Post a comment
Carbon Model Studio significantly reduces the time it takes to develop and deploy new system models.
Nusym Focuses on Intelligent Verification
News & Analysis  
5/14/2008   Post a comment
Nusym has formally introduced itself as an EDA company focused on "intelligent" verification.
How to raise the RTL abstraction level and design conciseness with SystemVerilog - Part 2
Design How-To  
5/14/2008   Post a comment
Using advanced HDLs like SystemVerilog, current hardware modeling styles can be enhanced both in terms of abstraction levels and overall efficiency.
Characterizing Nanometer CMOS PLLs, Sigma-Delta ADCs and AGCs
Design How-To  
5/13/2008   1 comment
The verification of analog/RF blocks presents challenges when using a digital fastSPICE simulator. The use of an analog fastSPICE simulator mitigates them.
Page 1 / 2   >   >>


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