Xilinx responds to Altera's FPGA benchmarks Programmable Logic DesignLine Blog 5/30/2008 2 comments The folks at Xilinx say that they've re-run the tests with different tool settings and, overall, the Xilinx software solution with Synplify Pro and ISE 10.1 dominates.
DAC targets 45-nm design News & Analysis 5/28/2008 Post a comment A special Management Day session during the upcoming Design Automation Conference will again tackle the toughest chip design issues using 45-nm process technology.
A model transistor News & Analysis 5/27/2008 Post a comment Researchers working on the EU-funded Robuspic project say they have developed accurate behavioural models that will help semiconductor companies design more efficient power transistors.
Analog design expertise is rare, valuable News & Analysis 5/27/2008 1 comment An enduring shortage of analog engineers--that may be getting worse rather than better--is requiring digital chip powerhouses to redouble their efforts to recruit and groom analog engineers.
Infiniscale unveils analog DFY tool News & Analysis 5/27/2008 Post a comment On the eve of Design Automation Conference in Anaheim, California, French EDA startup Infiniscale SA unveiled a model-based parametrical yield optimizer that is claimed to allow analog design-for-yield (DFY).
Verify the design of two-way radio Design How-To 5/26/2008 Post a comment This article describes how a design team at Motorola used the Berkeley Design Automation Analog FastSPICE circuit simulator to characterize complex analog/RF blocks for two-way radio and related communication devices.
CoFluent readies V3 of ESL modeling, simulation tool News & Analysis 5/23/2008 Post a comment As part of the pre-DAC drum roll of product announcements, French Electronic System Level (ESL) company CoFluent Design has unveiled version 3.0 of CoFluent Studio, an ESL graphical modeling and simulation toolset leveraging Eclipse technologies. Its availability is expected in the fourth quarter of 2008.
Dynamic Voltage Droops & Total Power Integrity Design How-To 5/23/2008 Post a comment This article sheds light on key differences such as voltage droops and noise wave propagation resulting from on-chip load interaction with power network impedance and discusses how total power integrity may be rigorously inspected through rapid analyses and physics-based simulations.
The DFM Melting Pot Blog 5/22/2008 Post a comment The DFM market segment is loosing member companies through acquisition. The remain small companies will find it harder to succeed.
Spatial brings 3D to EDA world Product News 5/21/2008 1 comment Spatial Corp., an operating division of Dassault Systèmes specializing in 3D components for technical applications, has introduced what it claims to be the first integrated suite aimed at accelerating EDA 3D analysis development.
De Geus: EDA has to be rethought News & Analysis 5/19/2008 Post a comment Seeing where the EDA industry is going is relatively easy. The difficult bit is laying out an EDA offering at the right time, when customers are ready to take it up, according to Aart de Geus, chairman and CEO of the Mountain View based company. And right now, everything in the EDA space has to be rethought, according to de Geus.
eSOL releases iPod connectivity support for its USB host driver Product News 5/18/2008 Post a comment eSOL has added an isochronous transfer mode and an audio class driver to its PrUSB /Host product, enabling USB host-based products such as car infotainment systems and navigation systems to receive audio streaming in real time over the standard USB connection from portable music players such as iPod from Apple.
Asset attests to embedded-test structures News & Analysis 5/15/2008 Post a comment As a natural extension of trends in the test and measurement business, the electronics industry is moving toward embedded instrumentation. Leading this movement is Asset InterTech Inc., dedicated to the development of IEEE 1149.1 tools.
As data rates begin to move beyond 25 Gbps channels, new problems arise. Getting to 50 Gbps channels might not be possible with the traditional NRZ (2-level) signaling. PAM4 lets data rates double with only a small increase in channel bandwidth by sending two bits per symbol. But, it brings new measurement and analysis problems. Signal integrity sage Ransom Stephens will explain how PAM4 differs from NRZ and what to expect in design, measurement, and signal analysis.
January 2016 Cartoon Caption ContestBob's punishment for missing his deadline was to be tied to his chair tantalizingly close to a disconnected cable, with one hand superglued to his desk and another to his chin, while the pages from his wall calendar were slowly torn away.122 comments