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posted in May 2010
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EVE's ZeBu supports TLM-2.0
Product News  
5/31/2010   Post a comment
DAC is around the corner, and EVE SA (Palaiseau, France) said it has added TLM-2.0 support to its ZeBu hardware-assisted verification platforms.
Activist investor Icahn says Mentor undervalued
News & Analysis  
5/28/2010   2 comments
Activist investor Carl Icahn disclosed owning nearly 7 percent of EDA vendor Mentor Graphics, requested a meeting with the company's management and said its shares are undervalued, it was widely reported.
SOFTWARE TOOLS - Rapita Systems launches improved version of RapiTime
News & Analysis  
5/28/2010   Post a comment
Rapita Systems Ltd has added new advanced features to RapiTime, the company's tool for the measurement and timing analysis of real-time embedded software. The latest release, RapiTime v2.3, improves execution time measurement, code coverage and worst-case execution time analysis.
SOFTWARE TOOLS - RTI and Remedy IT Integrate CORBA Component Model and DDS Standards
News & Analysis  
5/28/2010   Post a comment
Real-Time Innovations (RTI) has partnered with Remedy IT to support the DDS for Lightweight CCM (DDS4CCM) standard. This is the first integration of Object Management Group (OMG) Data Distribution Service for Real-time Systems (DDS)-compliant middleware with the OMG's Lightweight CORBA Component Model (CCM) framework.
US researchers hack automotive electronics
Special Report  
5/28/2010   Post a comment
In a shocking paper, a group of US-based researchers has proved that it is possible to compromise the security of the entire in-car electronic landscape. The scientists were able to take over the control over a vehicle via OBD-II and telematics interfaces and even to access and manipulate the most relevant safety features.
Silicon test and yield analysis products update
Design How-To  
5/28/2010   Post a comment
This paper introduces Mentor Graphics' new Tessent product platform and focuses on its latest features in silicon test and yield analysis.
SOFTWARE TOOLS - Mentor, Lauterbach team on accelerated hardware/software debug/verification suite
News & Analysis  
5/27/2010   Post a comment
Mentor Graphics Corp. and Lauterbach GmbH have collaborated to deliver a hardware-accelerated software development and debug platform for the verification of Systems-on-Chip (SoCs) and embedded systems.
Magma sharply narrows annual loss
News & Analysis  
5/27/2010   Post a comment
EDA vendor Magma Design Automation again topped its own sales target for the quarter ended May 2, but the company posted another loss in accordance with generally accepted accounting principles. The company's annual loss for the fiscal year narrowed sharply compared with the previous year.
SOFTWARE TOOLS - eTools Design Suite 8.1 boosts performance, cuts design time
News & Analysis  
5/27/2010   Post a comment
New features and utilities in eTools 8.1 Design Suite from eASIC enable designers to reduce overall design time by up to 40 percent while increasing design performance by up to 30 percent compared to eTools 8.0.
Doing Moore with less
Blog  
5/27/2010   Post a comment
For years, Numetrics has helped leading semiconductor R&D groups improve their development productivity. Today, it is launching a free trial product for EE Times readers that showcases some of the capability those R&D organizations use before they start their design projects.
New loss measurement requirement coming for circuit board fab shops
News & Analysis  
5/27/2010   1 comment
Intel is setting expectations with their circuit board fab houses that loss measurements will become a required performance metric for their high end server circuit boards.
Atrenta, AutoESL claim working 3D design flow
News & Analysis  
5/26/2010   Post a comment
On the eve of the 47th edition of the Design Automation Conference in Anaheim, Calif., Atrenta Inc. and AutoESL announced they will be demonstrating a working 3D design flow.
Code Coverage Convergence in Configurable IP
Design How-To  
5/26/2010   Post a comment
The authors of this paper have defined a method to generate code coverage reports for multiple configurations which reduces additional verification cycles. This methodology has been applied to verify the configurable USB 2.0 HS OTG DesignWare IP Core. The results are provided in the paper which shows significant improvement in the coverage numbers without any additional verification cycles.
Real Intent's DFT tool to achieve fault coverage at RTL
Product News  
5/26/2010   Post a comment
Real Intent Inc. has extended its Meridian product family with the introduction of a Design-For-Test (DFT) software tool.
Analog FastSPICE Multi-Core Parallel solution offers up to 50x higher performance
Product News  
5/26/2010   Post a comment
Berkeley Design Automation, Inc., provider of the Analog FastSPICE unified circuit verification platform (AFS Platform), has unveiled a new platform - the AFS Multi-Core Parallel operating mode (AFS MCP).
SOFTWARE TOOLS - Meridian DFT offers what-if analysis for DFT trade-offs
News & Analysis  
5/25/2010   Post a comment
Real Intent's new Meridian DFT (Design-For-Test) software identifies trouble spots during RTL creation and offers what-if analysis for DFT trade-offs.
SOFTWARE TOOLS: MetaCase and itemis to offer software dev automation based on DSM
News & Analysis  
5/25/2010   Post a comment
MetaCase, provider of domain-specific modeling environments, and itemis AG, consulting firm in the field of model-driven software development, are joining forces to offer software development automation solutions based on Domain-Specific Modeling (DSM). DSM increases the productivity of software developers by raising the level of abstraction and introducing automation.
Help Erach Desai's daughter
Programmable Logic DesignLine Blog  
5/25/2010   Post a comment
Erach Desai, a longtime analyst in the EDA and semiconductor community, is facing his worst nightmare. His 16-year-old daughter, Jacqueline, has been diagnosed with stage IV osteosarcoma, a rare form of bone cancer. They could use a helping hand.
Aldec FPGA simulation added to Altium Designer
News & Analysis  
5/25/2010   Post a comment
Altium and Aldec have signed an OEM agreement that adds Aldec's FPGA simulation capabilities to Altium Designer.
Meeting growing verification demands
Design How-To  
5/25/2010   Post a comment
This paper gives detailed overview of currently available verification methodologies suitable for large designs.
Webinar to explain designing with Actel's SmartFusion
News & Analysis  
5/25/2010   Post a comment
Actel Corpo. is holding a live series of webinars to introduce SmartFusion intelligent mixed signal FPGAs and the tool ecosystem for enabling design creation.
ARM uses Magma's characterization, modeling tool
News & Analysis  
5/25/2010   Post a comment
ARM Holdings plc said it has utilized SiliconSmart characterization and modeling software suite from Magma Design Automation Inc. to expand its production characterization system for Physical IP products.
EdXact enhances parasitics reduction, analysis tools
Product News  
5/25/2010   Post a comment
Post-layout verification specialist EdXact SA said it will release version 5.0 of Jivaro netlist reduction platform for analog circuits and version 3.2 of Comanche post-layout analysis tool at this year's DAC in Anaheim. Enhancements include interactive debugging capabilities, hierarchical file handling and improved selectivity features.
Software MUST be safe and secure
Blog  
5/24/2010   1 comment
Someone needs to be held accountable when things go wrong in the software.
Cadence agrees to help IBM make IP for 32-nm SOI
News & Analysis  
5/24/2010   Post a comment
EDA software vendor Cadence Design Systems Inc. (San Jose, Calif.) has announced a joint development agreement with IBM to create intellectual property cores for use in SoC Designs.
IMEC to open Shanghai R&D site, says report
News & Analysis  
5/24/2010   Post a comment
European research institute IMEC is planning to open a site in the Zhangjiang High-Tech Park in Shanghai, China for microelectronics training, licensing and technology transfer, according to a report by The Next Silicon Valley.
Visible light illuminates a new approach for wireless comms
News & Analysis  
5/24/2010   3 comments
With preparations well under way for a societal shift to solid-state lighting based on high-output LEDs, a proverbial light bulb has appeared above the heads of some forward-looking engineers.
Who'll provide the power behind the mainstream business tablet?
News & Analysis  
5/24/2010   6 comments
I recently got An iPad to try as part of our analysis work on the Apple tablet, and it is becoming apparent to me that devices of this class will grow to be as popular as the current crop of e-mail-enabled smartphones.
SOFTWARE TOOLS - ISE Design Suite 12 reduces power up to 30%
News & Analysis  
5/22/2010   Post a comment
Newest version of Xilinx ISE Design Suite 12 reduces power up to 30% and offers AXI4 support, partial reconfiguration, and lowered system cost.
Bringing MEMS into the IC design flow
Design How-To  
5/21/2010   Post a comment
This article describes the traditional MEMS design flow, discusses requirements for a “structured” and automated design flow, and shows an example flow that links a commercial MEMS 3D design environment with a custom IC design and simulation solution.
Enabling software reuse using successful component-based development practices
Design How-To  
5/21/2010   Post a comment
Software development techniques have evolved over the past 40 years from machine code to high-level languages and tools for system modeling and configuration. New technologies and platforms such as Java, .Net, CORBA and XML have helped practices such as Service Oriented Architecture (SOA), software reuse and Component-Based Development (CBD) become commonly accepted and practiced in the software development industry. This paper describes four examples where organizations have created and success
Debugging SuperSpeed USB software using virtual prototypes
Design How-To  
5/21/2010   Post a comment
This white paper describes how virtual prototype use models for hardware/software verification and the integration of the LeCroy analyzer software into Synopsys' DesignWare SuperSpeed USB verification environments help solve SuperSpeed USB IP development challenges.
Tabula selects ColdFire for 32-bit architecture
News & Analysis  
5/20/2010   1 comment
Programmable logic startup Tabula has selected the ColdFire embedded controller from IP vendor IPextreme as the 32-bit processor architecture of choice for Tabula's ABAX three-dimensional programmable logic devices, known by the company as 3PLDs.
Mentor, NetLogic seal multicore collaboration for embedded Linux
Product News  
5/20/2010   Post a comment
NetLogic Microsystems Inc. announced it is using the Linux Technology from Mentor Graphics Corp. for its XLP, XLR and XLS multicore, multithreaded processors.
CEO spotlights on IP biz as Synopsys tops estimates
News & Analysis  
5/19/2010   Post a comment
EDA and IP vendor Synopsys reported revenue gains on a sequential and year-over-year basis for the three months ended April 30, as the company beat consensus analyst expectations for revenue and profit for the period.
Tanner EDA sets foot in Southeast Asia
News & Analysis  
5/19/2010   Post a comment
With product demand increasing in Southeast Asia, Tanner EDA said it has named Advinno Technologies Pte. Ltd. of Singapore to provide sales and support for its HiPer Silicon full-flow analog IC design tool suite in Singapore, Malaysia, Thailand, Vietnam and Indonesia.
Protecting FPGAs from power analysis
Design How-To  
5/18/2010   1 comment
This article introduces static power analysis and dynamic power analysis attacks, discusses how these vulnerabilities apply to FPGAs, and provides guidance about the types of countermeasures that can be implemented to protect FPGAs against these attacks.
Analyst: Xilinx at risk of double ordering
News & Analysis  
5/18/2010   Post a comment
Programmable logic vendor Xilinx continues to face the risk of double ordering by customers due to growing lead times for some of its parts, according to a Wall Street analyst.
Xilinx, Hitachi announce new LongBench platform for system-level verification
Product News  
5/18/2010   Post a comment
The Japanese subsidiary of the No. 1 ranked vendor of programmable logic, Xilinx, has collaborated with Hitachi Information & Communication Engineering on a new LongBench platform for system-level verification designed around Xilinx Virtex-6 LX760 FPGAs and other members of the Virtex-6 families, the companies announced.
Ethernet controller IP implements new audio video bridging features
Product News  
5/18/2010   Post a comment
Synopsys, Inc., has unveiled the DesignWare Ethernet Quality-of-Service (QoS) Controller IP which implements the new IEEE specifications for audio video bridging (AVB) features.
Mediatek tapes out chips with Synopsys' IC Compiler
Product News  
5/18/2010   Post a comment
Taiwan chip maker Mediatek Inc. said it has standardized on Synopsys' IC Compiler physical design solution to improve performance, power and area on its wireless communications chips.
Magma's Titan supports IPL 1.0 iPDK standard
Product News  
5/18/2010   Post a comment
Magma Design Automation Inc. announced its Titan full-chip mixed-signal design, analysis and verification platform supports the IPL 1.0 Interoperable Process Design Kit (iPDK) standard.
Enabling high-precision DSP applications with the FPGA industry's first variable-precision architecture
Design How-To  
5/18/2010   Post a comment
The silicon digital signal processing (DSP) architecture of the FPGA can make a big difference when implementing complex signal-processing algorithms.
Initiative forms around anti-counterfeiting technology
News & Analysis  
5/18/2010   Post a comment
A group of electronics firms announced the formation of a security initiative around a technology designed to combat electronics counterfeiting.
SpringSoft joins Si2 OpenPDK Coalition
News & Analysis  
5/18/2010   Post a comment
SpringSoft, Inc. announced it has become a founding member of the Open Process Design Kit Coalition (OpenPDK) sponsored by the Silicon Integration Initiative, an organization focused on the development and adoption of standards to improve IC design.
Leipzig University students use Altium Designer
Product News  
5/18/2010   Post a comment
Australian design tool provider Altium Ltd. said masters students at the Institute of Process Automation and Embedded Systems at Leipzig University of Applied Sciences for Technology, Economics and Culture are using Altium Designer as part of their “Embedded Systems” module to improve their skills in circuit design, analysis and testing.
Pulsic joins industry groups
News & Analysis  
5/18/2010   Post a comment
Pulsic Ltd. (Bristol, England) announced it has simultaneously joined the Si2 Open PDK Coalition and the Interoperable PDK Libraries (IPL) Alliance to drive the development of more industry standards directly applicable to the custom design segment.
Current thoughts on custom IC design
Blog  
5/18/2010   2 comments
After 35 plus years of being in the semiconductor business, custom IC design still is an extremely interesting challenge.
Sidense denies Kilopass patent infringement allegations
News & Analysis  
5/17/2010   Post a comment
Sidense, a supplier of antifuse-based non-volatile memory IP cores, has said that the legal proceedings brought against it by rival memory IP supplier Kilopass for alleged patent infringement, are without substance or merit.
Magma's Titan supports TSMC's 40nm iPDK
Product News  
5/17/2010   Post a comment
Magma Design Automation Inc. said it has qualified its Titan full-chip mixed-signal design, analysis and verification platform for Taiwan Semiconductor Manufacturing Corp.'s 40nm Interoperable Process Design Kit (iPDK).
Page 1 / 2   >   >>


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