Après DACBut Wait, There's More Design How-To 6/18/2002 Post a comment The Design Automation Conference is over, but some additional product
announcements promise exciting design advancements down the road.
TechOnLine's Jim Lipman discusses some of the ones that were of
particular interest to him.
Complete SoC Design, Verification Reign at DAC Exhibits Design How-To 6/7/2002 Post a comment So you're going to the Design Automation Conference and don't know where to start on the exhibit floor? Save your shoe leatherTechOnLine's Jim Lipman takes you on a DAC virtual tour of some the most interesting products in several key technology areas.
ALF facilitates SI-aware design flow News & Analysis 6/5/2002 Post a comment Many of the challenges facing EDA tool users graduating to ASIC-style system-on-chip (SoC) design at 0.13 micron and below can be addressed through the use of new methodologies taking advantage of the Advanced Library Format (ALF).
FPGA Designs Take on Timing Closures News & Analysis 6/4/2002 Post a comment Over the last couple of years, FPGAs have made amazing advances in performance and capacity. Solutions, such as physical synthesis, are now needed that allow designers to take advantage of these improvements.
System C: a realistic SoC debug strategy News & Analysis 6/3/2002 Post a comment As Moore's Law steams ahead, the resulting rush to retool for ever-smaller geometries has led to the realization by most leading companies designing systems-on-chip that the emphasis in SoCs is on that "S," for system.
Blog Doing Math in FPGAs Tom Burke 5 comments For a recent project, I explored doing "real" (that is, non-integer) math on a Spartan 3 FPGA. FPGAs, by their nature, do integer math. That is, there's no floating-point ...