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posted in June 2005
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Actual 2005 DAC attendance down slightly
News & Analysis  
6/30/2005   Post a comment
General conference and exhibit attendance at the 2005 Design Automation Conference was down a little more than 1 percent from 2004, according to final attendance figures.
Upgrade unveiled for model-based comm design software
Product News  
6/30/2005   Post a comment
Communications Blockset 3 is the latest version of The Mathworks, Inc.'s software for designing and simulating the physical layer of wireless and wireline communications systems and components.
Mistral introduces rapid development kit for TI processor
Product News  
6/29/2005   Post a comment
Mistral Software in introduing a new rapid development kit designed to help accelerate product and application development processes on Texas Instruments' OMAP5912 dual-core processor.
Innovation, cooperation keys to DFM, says Synopsys exec
News & Analysis  
6/29/2005   Post a comment
Synopsys' Michel Cote told an audience at the Advanced Reticle Symposium that continued industry cooperation is the key to overcoming design-for-manufacturing challenges.
Magma, SMIC forge design service partnership
News & Analysis  
6/29/2005   Post a comment
Magma Design Automation and Semiconductor Manufacturing International Corp. announced a partnership to enable mutual customers to implement system-on-chip designs.
Eval. kit for PowerPC processor brims with development treats
Product News  
6/28/2005   Post a comment
Competitively-priced and filled with goodies, an evaluation kit for Applied Micro Circuits Corp.'s PowerPC 440EP includes a board called Yosemite, industry-standard development tools, sample applications, system benchmarks, and hardware design files.
ARM says technology reduces Java memory footprint by up to 3X
News & Analysis  
6/27/2005   Post a comment
ARM introduced a new technology, Jazelle RCT, which the company says can dramatically reduce memory footprint while increasing performance and saving power.
SMIC releases 180 nm design kit for use with Agilent tools
News & Analysis  
6/27/2005   Post a comment
Semiconductor Manufacturing International Corp. introduced a new design kit for its 180 nanometer CMOS process for use specifically with Agilent Technologies' Advanced Design System tools.
Sequence 'tool kit' plugs leaks
News & Analysis  
6/27/2005   Post a comment
Sequence Design this week is introducing CoolPower, a post-placement tool for minimizing leakage power and voltage drop.
All roads lead to 10-Gbit nets
Design How-To  
6/27/2005   Post a comment
Fibre Channel remains in the best position to lead the way to 10-Gbit storage networking.
How to improve verification planning
Design How-To  
6/27/2005   Post a comment
Cadence Design Systems' Steve Brown walks you through the steps involved in putting together a good verification plan, including the development of specifications, objectives, coverage models, and metrics.
Startup enhances tool suite with DFM applications
News & Analysis  
6/24/2005   Post a comment
Stone Pillar Technologies President Tim Crandle (shown) thinks design-for-manufacturability is largely a buzzword. But he also believes his company's technology can be a solution to the challenges behind it.
Altium releases Service Pack 4 for Altium Designer
News & Analysis  
6/24/2005   Post a comment
Windows-based design software provider Altium released Service Pack 4 for its Altium Designer unified application.
Swedish ASIC prototyping platform company creates U.S. subsidiary
News & Analysis  
6/23/2005   Post a comment
Swedish ASIC prototyping platform provider Hardi Electronics has formed a U.S. subsidiary and appointed a North American sales manager.
Aptix founder in Chapter 11, awaiting 2006 criminal trial
News & Analysis  
6/23/2005   Post a comment
Aptix founder Amr Mohsen, who allegedly tried to have a federal judge murdered in 2004, has new, court-appointed legal representation after filing for bankruptcy earlier this year.
Audio processor adds software for audio/video apps
Product News  
6/23/2005   Post a comment
Freescale Semiconductor is rolling out software libraries for its SCF5250 audio processor that will help enable new portable and automotive compressed audio and video solutions.
Software marriage means convenient cosimulation of microwave and RF passive elements
Product News  
6/23/2005   Post a comment
CST Microwave Studio (MWS), a 3D electromagnetic simulator from Computer Simulation Technology (CST), has been married to Agilent Technologies Inc.'s Advanced Design System (ADS) in a way that lets you work with MWS's passive circuit models to optimize and tune parameters without leaving the ADS interface.
Mentor names new VP of worldwide consulting
News & Analysis  
6/22/2005   Post a comment
Mentor Graphics named Paul Hofstadler, former CEO and founder of 360Bridge, vice president of worldwide consulting.
Wind River supporting Freescale's latest processor architectures
News & Analysis  
6/22/2005   Post a comment
Wind River Systems is extending its strategic relationship with Freescale Semiconductor to provide support for Freescale's latest PowerPC and PowerQuicc processors across all Wind River design software optimization platforms.
RoHS legislation and technical manual now available on-line
News & Analysis  
6/22/2005   Post a comment
Newark InOne now offers a RoHS Legislation and Technical Manual in a dowloadable format on its RoHS Express website.
Former Tektronix exec to head Agilent's Design Validation division
News & Analysis  
6/22/2005   Post a comment
Agilent Technologies has named David Churchill, a former Tektronix executive vice president, to head Agilent's Design Validation division.
Premier accomplissement de la collaboration entre EVE et Novas
News & Analysis  
6/22/2005   Post a comment
Emulation and Verification Engineering (EVE), fournisseur franco-américain de plates-formes de vérification fonctionnelle de circuits intégrés, a récemment annoncé les premiers fruits de sa collaboration avec Novas Software Inc., spécialiste des systèmes de débogage pour conceptions de puces complexes. Ensemble, ils sont parvenus à combiner la plate-forme de vérification matérielle ZeBu d’EVE avec le système de débogage automatique Verdi de Novas.
Zorian cited as Industrial Pioneer at DAC
News & Analysis  
6/21/2005   Post a comment
Yervant Zorian, a pioneer in chip testing techniques, was awarded the 2005 IEEE Industrial Pioneer Award at the Design Automation Conference last week for his contributions to design-for-test technology.
Symphony EDA rolls out VHDL simulator
Product News  
6/21/2005   Post a comment
Symphony EDA has introduced a VHDL simulation environment that the company claims reduces verification cycle time in complex chip designs while lowering the cost of ownership for high-performance simulation tools.
Zuken's new design solution aims to confront PCB complexity
News & Analysis  
6/21/2005   Post a comment
Zuken introduced a high-speed design solution aimed at helping designers cope with increasing printed circuit board complexity.
Infineon und Magma kooperieren bei 65 Nanometer
News & Analysis  
6/21/2005   Post a comment
Magma Desing Automation, Anbieter von Software für das Chipdesign, arbeitet mit Infineon bei der Entwicklung künftiger Chipgenerationen zusammen.
Motti Beck named CEO of Tera Systems
News & Analysis  
6/21/2005   Post a comment
Twenty-year semiconductor industry veteran Motti Beck was named CEO of EDA startup Tera Systems.
Top-down verification guides mixed-signal designs
Design How-To  
6/21/2005   Post a comment
With mixed signal Design, the challenge is not in size, write Cadence veterans Ken Kundert and Henry Chang, reprising issued raised at last week's Design Automation Conference. The challenge is in the sheer difficulty of achieving the needed performance, they say. Analog designers are used to erecting circuit from the bottom up. But Top Down Verification not only aids design, but also puts modeling and simulation on a schedule. This article is from the June Planet Analog magazine folio.
Development platform cuts wait to code iMX31 processor
Product News  
6/20/2005   Post a comment
If you love spending as much time as possible writing and testing code for wireless handsets, than the VPMX31 Virtual Platform Development Kit from Virtio Corp. is not for you.
New product promises billions of simulation cycles in hours
News & Analysis  
6/20/2005   Post a comment
Carbon Design Systems rolled out its Virtual System Prototyping product for hardware and software validation at last week's Design Automation Conference.
Tool buffs up regression testing
News & Analysis  
6/20/2005   Post a comment
Advanced Verification System (AVS), a verification management tool said to help speed IC regression testing, made its debut at last week's Design Automation Conference here.
Equivalency checking verifies sequential changes
Design How-To  
6/20/2005   Post a comment
Authors from startup Calypto Design Systems explain the use of sequential transformations to improve IC timing and power, and show how sequential equivalency checking can help manage those changes.
With more tools in the box, system-level design gains traction
News & Analysis  
6/17/2005   Post a comment
Designers gathered at the Design Automation Conference to share the promise and pitfalls of moving to software tools for IC design that address higher levels of abstraction than the accepted register-transfer level.
Synopsys to challenge $476 million back taxes assessment
News & Analysis  
6/17/2005   Post a comment
Synopsys plans to challenge a notification by the U.S. Internal Revenue Service that the company owes approximately $476.8 million (plus interest) in back taxes.
Les fournisseurs de CAO «peuvent mieux faire»
News & Analysis  
6/17/2005   Post a comment
Plus de 1 000 utilisateurs d’outils de CAO devaient remettre, lors de la DAC (Design Automation Conference), leurs copies à leurs fournisseurs et les appréciations pourraient les qualifier « d’incomplètes ».
Platform ASICs a natural fit at 90 nm, say DAC panelists
News & Analysis  
6/17/2005   Post a comment
Panelists debating the merits of platform ASICs agreed designers are entering an era of more uncertainty at the 90-nm process node than at any other technology shift.
Trust designs, but verify, say panelists
News & Analysis  
6/17/2005   Post a comment
Successful IC verification cannot be relegated to second fiddle in the design orchestra, according to experts at the Design Automation Conference.
EDA innovation costly, keynoter says
News & Analysis  
6/17/2005   Post a comment
It can take six years and millions of dollars to go from a problem to proliferation of a full-fledged product, said EDA technologist Ron Rohrer, at a Design Automation Conference keynote speech Thursday.
DAC attendance up slightly in 2005
News & Analysis  
6/17/2005   Post a comment
Preliminary figures show that just over 6,000 registered attendees came to the 42nd Design Automation Conference (DAC) here, a slight increase over the 5,900 attendees at last year's DAC.
Software optimized to enable DSP implementation into Virtex-4 FPGAs
Product News  
6/17/2005   Post a comment
Designers looking to put digital signal processing (DSP) functions into Xilinx Inc.’s Virtex-4 field-programmable gate array (FPGA) designs can now turn to Synplify Pro Software 8.1 from Synplicity Inc.
Panelists: power, leakage need to be addressed at system level
News & Analysis  
6/16/2005   Post a comment
IC power and leakage need to be addressed both earlier in design and at the system level, according to a collection of engineers from EDA and semiconductor companies who spoke at a Design Automation Conference panel.
Search for lower power continues at DAC
News & Analysis  
6/16/2005   Post a comment
The search to reduce active and standby power in advanced CMOS ICs continued as researchers and tool developers reported their progress at the Design Automation Conference.
IC designers cite "Titanic" challenges
News & Analysis  
6/16/2005   Post a comment
In a special session at the Design Automation Conference, four IC designers presented variability, reliability, power and methodology challenges not well served by existing tools and flows.
IP verification panel advocates standards
News & Analysis  
6/15/2005   Post a comment
Verification experts at a Wednesday DAC panel outlined the challenges of IP verification and urged the industry to create and adopt standards.
Linux comes with a price, says DAC panel
News & Analysis  
6/15/2005   Post a comment
When it comes to stability for EDA, tool integration, support for mission-critical enterprise applications and binary compatibility, Linux has a long way to go, according to a panel discussion at the Design Automation Conference.
Designers adopt ESL, but tools are lacking
News & Analysis  
6/15/2005   Post a comment
Chip designers are reporting success with electronic system level (ESL) design, but commercial EDA tools are falling short of what's needed, according to designers who spoke Tuesday at the Design Automation Conference.
Synopsys joins Si2, OpenAccess
News & Analysis  
6/15/2005   Post a comment
After years of resistance, Synopsys has joined the Silicon Integrations Initiative and that organization's OpenAccess community.
Class action suit filed against Magma
News & Analysis  
6/14/2005   Post a comment
Milberg Weiss Bershad & Schulman LLP has filed a class action suit against Magma Design Automation and its three top executives.
Page 1 / 3   >   >>


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