Breaking News
Content tagged with Design Tools (EDA)
posted in June 2008
Page 1 / 2   >   >>
Mentor Graphics publishes book on BGA routing
Product News  
6/30/2008   Post a comment
A new book on BGA routing from Mentor will be of mega-interest to folks trying to break-out FPGAs with thousands of pins.
Modeling and Simulating Magnetoresistive Sensors in Automobiles
Design How-To  
6/30/2008   Post a comment
Electronics and in particular, sensor technology, have made a decisive contribution to advances in the automobile as a means of accessing vehicles and interacting with its surroundings. The Magnetoresistive Effect supports a variety of sensor applications in automobiles. Since their first use in thin-film technology 30 years ago, MR-sensors have constantly captured new fields of application in magnetic field measurement.
Mentor hires advisors for Cadence bid
News & Analysis  
6/30/2008   1 comment
Is this the beginning of the end for Mentor Graphics Corp.?
Altera DSP tools get big performance boost
Product News  
6/30/2008   Post a comment
DSP Builder 8.0 features timing-aware Simulink synthesis.
Autodesk ends interest in bid for Flomerics
News & Analysis  
6/27/2008   Post a comment
Autodesk will not pursue its interest in simulation software group Flomerics (Hampton Court, England) leaving the field clear again for Mentor Graphics, who has a 29 percent stake in the British company and who has made several bids to take control.
ARM RealView tool family supports Freescale processors
Product News  
6/26/2008   Post a comment
ARM's RealView family of development tools now provides device support for the i.MX31 processor line to enable embedded developers to start development on Freescale's multimedia applications processors quickly.
Leveraging Virtual Platforms for Embedded Software Validation: Part 2
Design How-To  
6/25/2008   Post a comment
In Part 2 of a series a case study is provided to illustrate the concepts and benefits of using a well-modeled virtual platform of a simple system-on-chip (SoC) design.
Mentor Accelerates Verification of PCI Express Applications
Product News  
6/25/2008   Post a comment
Mentor Graphics announced its high-performance platform to accelerate the verification of PCI Express products.
High Profile Adviser for Mentor?
News & Analysis  
6/25/2008   Post a comment
There are speculations that Frank Quattrone is advising Mentor in its fight to avoid being acquired by Cadence.
Agility introduces programmable platform for image and signal processing
Product News  
6/24/2008   Post a comment
The RC240 programmable platform from Agility Design Solutions combines an FPGA and ARM CPU to save months on algorithm prototyping.
Webcast on signal integrity issues with FPGAs
News & Analysis  
6/23/2008   Post a comment
Agilent Technologies is offering a webcast on signal integrity issues with FPGAs.
New Publishing And Version Control Features From Altium
Product News  
6/23/2008   Post a comment
Altium has added project management and design data publishing capabilities to its unified electronic design solution.
Board Interchanger for Concurrent Mechanical and PCB Design
Product News  
6/23/2008   Post a comment
Board Interchangeris a tool from Zuken for concurrent mechanical and PCB design.
Credence, LTX plan merger of equals
News & Analysis  
6/23/2008   Post a comment
ATE gear rivals Credence Systems Corporation and LTX Corporation are planning to merge in an all-stock merger of equals.
Timing-driven Simulink FPGA synthesis
Design How-To  
6/22/2008   Post a comment
The latest Simulink blocksets take in top-level system timing constraints to achieve a level of performance previously achievable only with hand coded HDL. Here's how it works.
Single Flow for Interconnecting IP
Design How-To  
6/20/2008   Post a comment
While, suppliers of Interconnect Matrix components provide complex architectures for hardware, the SoC team is also responsible for producing other associated design view outputs such as documentation and code for software development, test and verification.
Cadence Enhances RF Verification
Product News  
6/20/2008   Post a comment
Cadence Design Systems, Inc. has introduced a new simulation technology to verify wireless integrated circuits implemented in advanced CMOS process nodes
Is Mentor's Rhines too nice for takeover battle?
News & Analysis  
6/20/2008   1 comment
What few outsiders know about Walden Rhines is that the long-time chairman and chief executive of Mentor Graphics Corp. could possibly be the champion punster of the EDA industry.
A Magma and Mentor Merger?
Programmable Logic DesignLine Blog  
6/19/2008   Post a comment
I just perused a blog by Gabe Moretti that has certainly given me "food for thought."
M&M Would Be Sweet
Blog  
6/19/2008   Post a comment
Cadence's hidden costs for the Mentor acquisition are too high. But Mentor has a viable defense move.
Commentary: Cadence-Mentor: facts vs. emotions
Blog  
6/19/2008   2 comments
Cadence Design Systems Inc.'s offer for Mentor Graphics is generating strong emotions in the electronic design automation market but Mentor Graphics' directors must base their final decision on the financial merits and disadvantages of the offer.
Altium announces new publishing and version control capabilities
Product News  
6/18/2008   Post a comment
Extensive publishing outputs, new version control for graphical files, new automatic document previews -- all out of the box.
Cadentor's Products
Blog  
6/18/2008   3 comments
A discussion on the tradeoffs required by the Cadence acquisition of Mentor product families.
Design tool for concurrent mechanical and PCB design
News & Analysis  
6/18/2008   Post a comment
Zuken has partnered with Dassault Systmes to launch Board Interchanger, a new integrative add-on tool for true concurrent mechanical and PCB design.
Apple submits OpenCL for parallel C role
News & Analysis  
6/17/2008   Post a comment
Apple Inc. has submitted its OpenCL to the Khronos Group as a candidate for an ad hoc standard programming environment for applications running across both x86 and graphics chips.
Analyst: Cadence/Mentor merger 'a bad idea'
News & Analysis  
6/17/2008   1 comment
Cadence Design Systems is under pressure and may lose its top spot in the electronic design automation sector, but its proposed $1.6 billion merger with Mentor Graphics is "a really bad idea," said a veteran EDA analyst.
Cadence's Arrogance
Blog  
6/17/2008   7 comments
Cadence bid for Mentor is similar to the Daisy acquisition of Cadnetix.
Cadence bids to buy Mentor Graphics
News & Analysis  
6/17/2008   Post a comment
Cadence Design Systems, Inc. announced it has submitted a proposal to the board of directors of Mentor Graphics Corp. to acquire Mentor Graphics for $16.00 per share in cash. The transaction is valued at $1.6 billion.
Russia moving on fabless development path, says Cadence
News & Analysis  
6/16/2008   Post a comment
A cocktail of Russian government support, research talent and Western technology assistance has created strong potential for fabless industry growth.
Multithreading threatens to unravel beyond 45 nm
News & Analysis  
6/16/2008   2 comments
The EDA industry is having second thoughts about whether adding multithreading capabilities to design automation tools is the best way to exploit multicore systems. "Threads are dead," Gary Smith, founder and chief analyst for Gary Smith EDA, said at the Design Automation Conference.
Commentary: Collaborative conundrum
News & Analysis  
6/16/2008   Post a comment
Partners in the design flow at 45 nm and beyond must consider three basic propositions: when to differentiate, when to aggregate and when to collaborate.
Group's 'interoperable' analog flow turns up heat on Cadence
News & Analysis  
6/13/2008   Post a comment
The once-sleepy analog EDA market is suddenly the new buzz in town, as a number of forces are in play to advance the technology and threaten Cadence Systems Inc.'s stranglehold in the market.
EInfochips rolls HDMI universal verification component
Product News  
6/13/2008   Post a comment
India's eInfochips has unveiled a "universal verification component" designed to verify High-Definition Multimedia Interface transmitters and receivers.
EDA still software-challenged
News & Analysis  
6/12/2008   Post a comment
For the third consecutive year, Gary Smith, founder and chief analyst for Gary Smith EDA, emphasized at the Design Automation Conference (DAC) that embedded software development is the biggest challenge in system-on-chip design.
Saucy algorithm exploits symmetries
News & Analysis  
6/12/2008   Post a comment
The developers of an algorithm called "Saucy" claim it can solve such problems quickly by finding symmetries among large swaths of possibilities.
Frequency domain tutorial, part 1: Dealing with ambiguity
Design How-To  
6/12/2008   Post a comment
Here's what you need to know about the mathematics and notation of FFTs and the discrete frequency domain. We start by discussing the ambiguities of discrete signals.
Mentor forms design-to-silicon unit
News & Analysis  
6/11/2008   1 comment
Seeking to drive the integration of its three platforms, Mentor Graphics Corp. has merged several offerings into a single design-to-silicon division.
Intel CTO rethinks analog as computational problem
News & Analysis  
6/11/2008   Post a comment
One phrase defines Intel's Justin Rattner: "Think, but rethink".
Study: How does the brain separate audio signals from noise?
Audio DesignLine Blog  
6/11/2008   Post a comment
By measuring brain responses of listeners performing an auditory detection test (hear it for yourself) researchers have moved closer to solving the mystery of how the human brain extracts meaningful signals from noisy acoustic environments.
Analog design, 'green' tech dominate DAC
News & Analysis  
6/11/2008   Post a comment
Analog design is proving to be a hot topic at this year's Design Automation Conference in Anaheim, Calif.
Leading Edge Developments Face Old Problems
Blog  
6/11/2008   Post a comment
The problem faced by leading edge development teams are often simular to those faced many years before.
Analog/RF mixed signal simulator introduced by Berkeley Design Automation
Product News  
6/11/2008   Post a comment
A SPICE accurate analog/RF mixed-signal verification based on co-simulation of its Analog FastSPICE circuit simulator with Verilog HDL simulators has been introduced.
CADENCE AND UMC DELIVER 65NM CPF-BASED LOW-POWER REFERENCE DESIGN FLOW
Product News  
6/11/2008   Post a comment
CPF-Based 65nm Low-Power Reference Design Flow Address Complex Design Issues and Accelerates High-Performance, Low-Power Designs
Award to Honor of Richard Newton' s Legacy
News & Analysis  
6/11/2008   Post a comment
SIGDA and C-EDA institute award to honor Richard Newton's impact on the EDA industry.
Calling all FPGA companies in stealth mode...
Programmable Logic DesignLine Blog  
6/10/2008   Post a comment
I've recently been pondering how many future FPGA companies are out there already working in stealth mode.
IBM reports milestone for its interconnect modeling tool
News & Analysis  
6/9/2008   Post a comment
Researchers at IBM Corp.'s Watson Research Center reported a new computational milestone for electromagnetic surface modeling, or EMSurf, full-wave electromagnetic field solver tool running in parallel mode.
Lattice expands wireless solutions with 3FPP-LTE CTC decoder IP core
Design How-To  
6/9/2008   Post a comment
TurboConcept Optimizes its 3GPP-LTE Turbo Decoder IP Core for LatticeSC/M and LatticeECP2/M FPGAs.
Altera SOPC builder tool adds third embedded soft processor core option
Product News  
6/9/2008   Post a comment
Freescale V1 ColdFire soft core joins Altera Nios II Processor Core and ARM Cortex M1 to provide system designers maximum flexibility.
Synfora extends PICO Extreme algorithmic synthesis to FPGAs
Product News  
6/9/2008   Post a comment
Synfora says that a technology breakthrough builds on collaboration between Xilinx and Synfora, targets Xilinx Virtex and Spartan devices.
Resonant-clocked design tools target ARM core
News & Analysis  
6/9/2008   Post a comment
Cyclos Semiconductor, Inc. announced a proof-of-concept processor implementation using its platform and standard-cell design flow.
Page 1 / 2   >   >>


Most Recent Comments
BrainiacVI
 
BrainiacVI
 
BrainiacVI
 
Max The Magnificent
 
Avinash Jois
 
Max The Magnificent
 
y_sasaki
 
dwhess
 
Max The Magnificent
EE Life
Frankenstein's Fix, Teardowns, Sideshows, Design Contests, Reader Content & More
Max Maxfield

Aging Brass: Cow Poop vs. Horse Doo-Doo
Max Maxfield
38 comments
As you may recall, one of the things I want to do with the brass panels I'm using in my Inamorata Prognostication Engine is to make them look really old. Since everything is being mounted ...

EDN Staff

11 Summer Vacation Spots for Engineers
EDN Staff
11 comments
This collection of places from technology history, museums, and modern marvels is a roadmap for an engineering adventure that will take you around the world. Here are just a few spots ...

Glen Chenier

Engineers Solve Analog/Digital Problem, Invent Creative Expletives
Glen Chenier
11 comments
- An analog engineer and a digital engineer join forces, use their respective skills, and pull a few bunnies out of a hat to troubleshoot a system with which they are completely ...

Larry Desjardin

Engineers Should Study Finance: 5 Reasons Why
Larry Desjardin
45 comments
I'm a big proponent of engineers learning financial basics. Why? Because engineers are making decisions all the time, in multiple ways. Having a good financial understanding guides these ...

Flash Poll
Like Us on Facebook
EE Times on Twitter
EE Times Twitter Feed

Datasheets.com Parts Search

185 million searchable parts
(please enter a part number or hit search to begin)