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posted in July 2009
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Video: EDA eyes new opportunities for growth
News & Analysis  
7/31/2009   Post a comment
Opportunities for EDA to generate more revenue from outside the semiconductor industry frequently surfaced in discussion at this year's Design Automation Conference, with executives suggesting that EDA could play in markets including medical devices, military/aerospace, automotive and clean energy technology.
Asyst sells assets to three companies
News & Analysis  
7/30/2009   Post a comment
Ending perhaps the last chapter in a painful saga, Asyst Technologies Inc. has agreed to sell its entire assets to three companies: Crossing Automation Inc., Murata Machinery Ltd. and the Peer Group.
TSMC raises capex, yields up in strong Q1
News & Analysis  
7/30/2009   Post a comment
Taiwan Semiconductor Manufacturing Co. Ltd. (TSMC) posted strong results in the second quarter and raised its capital spending for 2009.
DAC attendance spots recessionary times
News & Analysis  
7/30/2009   Post a comment
Preliminary attendace figures at this year's Design Automation Conference show an increase in total conference and exhibit attendance by 12 percent over last year's DAC held in Anaheim, Calif. and by three percent over the 2007 San Diego event.
GlobalFoundries could be the elusive Eurofoundry, and more
News & Analysis  
7/30/2009   1 comment
If Infineon could be persuaded to follow ST and switch outsourced IC manufacturing to GlobalFoundries in Dresden, we would some of the way along the path to creating a Eurofoundry that would keep advanced digital CMOS manufacturing in Europe, albeit with the help of Abu-Dhabian petrodollars.
Micronova shrinks HiL simulator to desktop size
Product News  
7/30/2009   Post a comment
With the NovaSim Micro, test devices vendor Micronova (Vierkirchen, Germany) has shrunk Hardware-in-the-loop (HiL) simulators to desktop size. Despite its small size, the simulator runs function tests on complex ECUs, the vendor promises.
Nvidia chief scientist to EDA: Give us power tools
News & Analysis  
7/30/2009   Post a comment
Nvidia's chief scientist told the EDA community that chip designers need new tools to usher in a new era of computing, moving to "throughput computing" from an era of "denial architecture" that has seen the semiconductor industry squeeze more performance out of single-thread processors thanks to software.
Mentor Graphics unveils embedded Linux strategy
News & Analysis  
7/30/2009   Post a comment
Mentor Graphics has expanded its position in embedded software with the unveiling of its Android and Linux strategy at the Design Automation Conference here.
ESL/HLS buzz at DAC
Programmable Logic DesignLine Blog  
7/30/2009   1 comment
The buzz over electronic-system level design and high-level synthesis seems to have reached a new level at this year's Design Automation Conference.
Cadence Q2 net hurt by falling sales, charges
News & Analysis  
7/30/2009   Post a comment
Cadence Design Systems Inc.'s net loss worsened in the second quarter on a 32 percent decline in sales even as the company intensified reorganization activities aimed at restoring it to profitability.
Panel: Future job prospects bright for EDA pros
News & Analysis  
7/29/2009   Post a comment
Amid concerns that EDA may be permanently shrinking, technical professionals with EDA experience nevertheless have good future job prospects, according to members of a career-oriented panel discussion at the Design Automation Conference.
News from DAC: Mentor Graphics unveils embedded Linux strategy
News & Analysis  
7/29/2009   Post a comment
The latest news from the 46th Design Automation Conference, including an announcment from Magma Design Automation that its independent auditor has formally raised questions about the company's ongoing viability.
DFM debated as a 'weapon of mass design'
News & Analysis  
7/29/2009   Post a comment
The more than abused DFM acronym reared its ugly head again at a leading design engineering forum. The consensus is that Design for Manufacturing has its place in the chip design world, but basically it's a crapshoot.
MIT's 'bokode' chip said to outperform bar codes
News & Analysis  
7/29/2009   Post a comment
A new kind of identification tag that combines the security of a bar code with the capacity of an RFID tag will debut at the Siggraph 2009 conference.
TSMC keynoter touts cooperative business models
News & Analysis  
7/29/2009   Post a comment
Future growth in EDA and other segments of the semiconductor industry supply chain depends on the evolution of a new breed of collaborative business model that enable partners to pool costs and increase profits, according to Fu-Chieh Hsu, vice president of Design & Technology Platform at TSMC.
Virage Logic tapes out its first 32/28nm IP test chip
News & Analysis  
7/28/2009   Post a comment
Virage Logic has taped out a 32/28-nanometer process node test chip with multiple IPs optimized for a high performance application for an early adopter customer.
SOFTWARE TOOLS - Arria II GX Development Kit speeds development of high-performance 3Gbps apps
Product News  
7/28/2009   Post a comment
The new Arria II GX Development Kit from Altera speeds development of high-performance 3Gbps apps and enables rapid adoption of low-cost, low power applications requiring transceivers.'
Virage Logic offers PCI Express PHY IP in volume
Product News  
7/28/2009   Post a comment
Virage Logic Corp. announced its volume production-proven 40-nm G PCI Express Gen1/Gen2 Physical Layer (PHY) IP block.
The 'big three' EDA execs speak in 'one voice'
Blog  
7/28/2009   Post a comment
EDA industry's "big three" held a panel session at DAC on the future of EDA and agreed that this is not "your father's recession." They offered some food for thought.
The TSMC Tsunami at DAC 2009
Blog  
7/28/2009   Post a comment
In a well-orchestrated and clearly scripted show of force, the CEOs of the three "largest" companies in EDA appeared together under the Big Top at the 2009 Design Automation Conference in San Francisco on Monday, July 27th, for a highly touted afternoon keynote panel purportedly addressing "Futures for EDA."
ST uses Cadence signoff suite for 65- to 32nm design
News & Analysis  
7/28/2009   Post a comment
European chipmaker STMicroelectronics NV said it has selected integration signoff solutions from Cadence Design Systems, Inc., including QRC Extraction and Encounter Timing System, for 65- to 32-nm design. It is qualifying the system for 32-nm process technologies.
Mentor rolls architecture-level power tool
Product News  
7/28/2009   Post a comment
Mentor Graphics introduced the Vista platform for architecture design and prototyping, enabling users to model, analyze and optimize power at the transaction level of abstraction.
EDA chiefs debate getting bigger slice of the pie
News & Analysis  
7/28/2009   Post a comment
The age-old question of whether EDA gets its fair share of semiconductor ecosystem revenue reared its head at a panel discussion involving the CEOs of EDA's three largest companies at the Design Automation Conference, with at least one suggesting that the current recession may be the catalyst for a favorable change.
Changing SoC design methodologies to automate IP integration and reuse
Design How-To  
7/27/2009   Post a comment
Automated SoC assembly techniques have rapidly emerged as the standard approach for building today's complex SoC designs. Atrenta author explains.
Updated: Magma hit with 'going concern' notice
News & Analysis  
7/27/2009   1 comment
Troubled EDA vendor Magma Design Automation's independent auditor has raised questions about the company's ongoing viability.
Atrenta extends platform for chip architecture designs
Product News  
7/27/2009   Post a comment
Atrenta Inc. has made major extensions to its 1Team-Genesis platform, which supports architectural level chip assembly
Synopsys joins Common Platform, ARM for 32/22nm designs
News & Analysis  
7/27/2009   Post a comment
Leading EDA, IC and IP companies are testing the waters on how one combines low-power processor architecture, integrated design flow, and system-level IP on a common platform foundry process.
Dolphin Integration readies audio converter for mobile devices
News & Analysis  
7/27/2009   Post a comment
EDA and IP company Dolphin Integration SA (Meylan, France) has introduced a digital audio converter suitable for mobile consumer devices with a SNR of 95 dB.
TU Dresden brings power efficient MPSoC to DAC
News & Analysis  
7/27/2009   Post a comment
At the Design Automation Conference (DAC) that currently takes place in San Francisco, a group of researchers and chip designers from the Dresden Technical University present what they hope it could offer a solution for the challenge of modem signal processing for upcoming wireless communications generations.
Calypto offers 'full design flow' for SoC IP blocks
Product News  
7/27/2009   Post a comment
Calypto Design Systems Inc. is offering what it labels as a fully automated design flow aimed at IP blocks in SoC designs and is showing it at the Design Autmation Conference here.
Magillem unveils verification tool
Product News  
7/27/2009   Post a comment
Seeking to ease the verification of complex functionality, Paris-based Magillem Design Services has introduced the Magillem Verification Solution.
OSCI reports on its progress at DAC
News & Analysis  
7/27/2009   Post a comment
The Open SystemC Initiative is reporting milestones achieved by three of its working groups at the Design Automation Conference here.
FPGA startups stare down giants and ghosts
News & Analysis  
7/27/2009   4 comments
Cswitch Corp. made waves and headlines in 2006 when it unveiled a novel configurable array architecture said to be capable of narrowing the performance and density gaps between field-programmable gate arrays and application-specific ICs.
Natural iridescence harnessed for reflective displays
News & Analysis  
7/27/2009   1 comment
Researchers at the Georgia Institute of Technology said they have unearthed the secret of natural liquid crystals that reflect light as bright as a back-lit LCD.
SOFTWARE TOOLS - Lynguent introduces Simulink Emulation Toolkit for its ModLyng Integrated Modeling Environment
Product News  
7/25/2009   Post a comment
Lynguent, Inc., has introduced the Simulink Emulation Toolkit to bridge the gap between system-level design and circuit implementation for analong mixed-signal AMA models.
ST uses Ciranova PyCells to develop physical design kit at 32-nm
News & Analysis  
7/24/2009   Post a comment
STMicroelectronics NV (Geneva, Switzerland) announced it has licensed the PyCell architecture from EDA company Ciranova Inc. (Santa Clara, Calif) in order to provide PyCell-based physical design kits for advanced silicon technologies at 32-nm, 28-nm and beyond.
Viewpoint: Tesla, design and the art of innovation
Design How-To  
7/24/2009   7 comments
There's a lot of talk about innovation, but how do we define true technology innovation? The author argues that the Tesla Roadster provides a window into how innovation in auto design should be pursued.
Mistral premieres Multimedia Daughter Card to augment OMAP EVM functionality
News & Analysis  
7/24/2009   Post a comment
Mistral Solutions, the Bangalore-based provider of technology solutions and services in the embedded space, has launched the Multimedia Daughter Card (MDC) for the OMAP35x EVM. The MDC, a plug-in card for the OMAP35x EVM, supports both video and camera input in addition to a high-speed USB 2.0 port.
DAC preview: Power again takes center stage
News & Analysis  
7/24/2009   Post a comment
As has been the case for the past several years, low-power design is a sure bet to emerge as one of the central themes of the 46th Design Automation Conference, set for next week.
Simulation tool aims to simplify design and product selection to speed time-to-market
News & Analysis  
7/23/2009   Post a comment
Fairchild Semiconductor is providing designers of portable applications with a web-based simulation tool to quickly and accurately assess the performance of advanced load switches in actual application circuits.
Execs examine keys to Indian embedded systems growth
News & Analysis  
7/23/2009   Post a comment
Industry executives told the Embedded Systems Conference Bangalore 2009 that significant opportunities exist here in the embedded market.
GateRocket shipping RocketDrive for Strativ IVs
Product News  
7/23/2009   Post a comment
GateRocket said this week it's now shipping its RocketDrive for Altera's Stratix IV FPGAs.
State offical: Bangalore semi policy due in August
News & Analysis  
7/22/2009   Post a comment
A semiconductor policy for the southern Indian state of Karnataka is expected to be announced by the government next month, according to a state official speaking at the Embedded Systems Conference Bangalore.
Xilinx Virtex-6 FPGA User Guide Lite
Design How-To  
7/22/2009   2 comments
This paper gives potential users an easy-to-grasp idea of the device functions of Xilinx Virtex-6 FPGAs. It describes the functionality of these devices in far more detail than in the data sheet--but avoids the minute implementation details covered in the various Virtex-6 FPGA user guides.
Brazilian IC venture opens design center
News & Analysis  
7/22/2009   Post a comment
Brazilian government-back chip venture Ceitec said it opened an IC design center in the Brazilian state of Rio Grande do Sul.
NXP taps Target's processor design kit for auto security apps
Product News  
7/22/2009   Post a comment
An IP programmer tool suite from application-specific processor design tool supplier Target Compiler Technologies has been adopted as a software development kit by NXP Semiconductors.
Sigrity enhances IC package modeling pak
Product News  
7/22/2009   Post a comment
Sigrity unveiled a new version of its XtractIM product that allows package designers to assess performance of signal and power delivery nets intuitively, characterize a broader set of package types, and extract electrical models with improved accuracy.
The business of IP: it ain't a bake sale
Blog  
7/22/2009   3 comments
IP vendors have long maintained that theirs is a product business model. In the face of rising complexity and shrinking geometries, however, selling IP may no longer be about baking up a plate of brownies, sealing it in shrink wrap, and putting it out there for sale.
TSMC's 28-nm reference flow adds SiP solutions
News & Analysis  
7/22/2009   Post a comment
TSMC introduced its latest design reference flow, said to extend the company's recommended design methodology to the 28-nm node.
DAC showing for 'push-button' analog test
Product News  
7/21/2009   Post a comment
Analog built-in-self-test specialist ATEEDA will be seeking to woo fabless companies at DAC 2009 with an EDA tool that automatically generates HDL or Verilog code to add analog BIST capabilities to mixed signal silicon.
Page 1 / 3   >   >>


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