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posted in July 2010
AWR presents AWR Connected for Cadence Allegro
Product News  
7/6/2010   Post a comment
AWR Corp. has unveiled AWR Connected for Cadence Allegro to streamline high performance PCB design.
Calibre xACT 3D—No compromise extraction for advanced transistor level design
Product News  
7/6/2010   Post a comment
This paper details how the Calibre xACT 3D extraction solution addresses the extraction challenges for design sign-off at advanced nodes.
LabVIEW comes in handy for logic analyzer design
Product News  
7/6/2010   Post a comment
Klaus Zietlow has used National Instruments’ LabVIEW to help design a logic analyzer using the Opal Kelly XEM3005 and breakout board, which included Opal Kelly FrontPanel Software Development Kit (SDK).
Calibre Pattern Matching: Picture It Match It... Done!
Design How-To  
7/6/2010   Post a comment
This white paper discusses the conditions that have created the need for pattern matching techniques, the identification and creation of patterns, the Calibre Pattern Matching process, and the benefits derived from its use.
Concurrent CFD analysis methods boost automotive design productivity
Design How-To  
7/5/2010   Post a comment
A new class of analysis software, Concurrent CFD, has proven to be very effective for performing heat, fluid and airflow analyses and optimizing the design and manufacture of automotive parts and systems including heating, cooling, fuel injection, and even body panels.
OVM guidelines
Design How-To  
7/5/2010   Post a comment
This document provides some structure to OVM in the same way that OVM provides structure to the SystemVerilog language. The OVM library is both a collection of classes and a methodology for how to use those base classes.
Fundamental challenges of PCB assembly and test
Blog  
7/5/2010   Post a comment
This white paper provides a description of the PCB manufacturing process along with the challenges facing today's electronics manufacturers with respect to the Manufacturing System Solutions (MSS) portfolio of the Valor Division of Mentor Graphics.
VeriLogger environment available with free 6 month license
Product News  
7/2/2010   Post a comment
SynaptiCAD Inc. has released an updated version of VeriLogger Extreme, a compiled-code Verilog simulation and debugging environment, that adds support for encrypted IP models from Actel, Altera, and Xilinx.


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As data rates begin to move beyond 25 Gbps channels, new problems arise. Getting to 50 Gbps channels might not be possible with the traditional NRZ (2-level) signaling. PAM4 lets data rates double with only a small increase in channel bandwidth by sending two bits per symbol. But, it brings new measurement and analysis problems. Signal integrity sage Ransom Stephens will explain how PAM4 differs from NRZ and what to expect in design, measurement, and signal analysis.

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