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posted in July 2014
Life After 28nm: Think Network-on-Chip
Blog  
7/25/2014   Post a comment
As Moore’s Law reverses beyond 28nm, consider network-on-chip (NoC). While more and more content in SoC designs is coming from third-party IP providers, interconnect-fabric is one area that is still in transition.
Is Your Processor IP ISO 26262-Compliant?
Blog  
7/21/2014   4 comments
With the growth in ADAS and the growing demand for more safety-related SoCs and systems, it is important for semiconductor industry to have access to more ISO 26262-targeted IP products.
Cadence's New Quantus QRC Extraction Solution
News & Analysis  
7/15/2014   1 comment
New massively parallel architecture is TSMC-certified for 16nm FinFET designs.


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As data rates begin to move beyond 25 Gbps channels, new problems arise. Getting to 50 Gbps channels might not be possible with the traditional NRZ (2-level) signaling. PAM4 lets data rates double with only a small increase in channel bandwidth by sending two bits per symbol. But, it brings new measurement and analysis problems. Signal integrity sage Ransom Stephens will explain how PAM4 differs from NRZ and what to expect in design, measurement, and signal analysis.

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