Breaking News
Content tagged with Design Tools (EDA)
posted in August 2002
SoC-based designs challenge traditional design flows
Design How-To  
8/30/2002   Post a comment
When the semiconductor division of Philips undertook the ambitious task of designing a family of microcontrollers that would remove all the impediments to migration from 8- to 32-bit architectures, we knew that our primary objective was to eliminate the cost barriers while at the same time ensuring deterministic, real-time performance and adequate bandwidth in a package small enough to be deployed in a variety of small-footprint embedded control applications.
SoC-based configurable systems replace the microcontroller
Design How-To  
8/30/2002   Post a comment
Many products once designed using 8-bit microcontrollers with external digital and analog circuitry are being re-designed using SoC devices.
Method ensures on-track designs
News & Analysis  
8/19/2002   Post a comment
Achieving functional closure on register-transfer-level designs continues to be one of the greatest challenges for today's ASIC and system-on-chip design teams.
Library promotes common standard for design properties
Design How-To  
8/19/2002   Post a comment
The Open Verification Library (OVL) provides a standard set of assertion modules that not only enhance simulation but also ease the adoption of RTL formal verification tools.
Design closure becomes elusive for the SoC generation
Design How-To  
8/19/2002   Post a comment
Computer scientists use the term "combinatorial explosion" to describe what happens when variables are added to certain difficult-to-execute algorithms.
Design Closure
Design How-To  
8/19/2002   Post a comment
ASIC design flow gives CPU core custom performance
Design How-To  
8/19/2002   Post a comment
The ever-increasing levels of CPU performance demanded by embedded applications and product design cycles that have often been reduced to only a few months, have made it important to produce synthesizable processor cores capable of execution speeds typically only achievable by complex custom solutions.
A silicon virtual prototype is key in achieving design closure
Design How-To  
8/19/2002   13 comments
The silicon virtual prototype (SVP) emerged as one of the strongest themes from this year's Design Automation Conference in New Orleans.
A case for using FPGAs in SDR PHY
Design How-To  
8/9/2002   Post a comment
Software-defined radio (SDR) technology is undergoing a difficult birthing process.
CAUTION: Mandatory Methodology Shift Ahead
Design How-To  
8/8/2002   Post a comment
The spiraling expense and design time associated with chips fabricated in ever-shrinking design technologies is impacting how and when a chip designer hands off a design to the system designer. Tera Systems' Mark Miller discusses the pros and cons of RTL and gate-level handoff and how both require early awareness of the implications of the design's micro architecture along with high-quality RTL code.


Most Recent Comments
BrainiacVI
 
BrainiacVI
 
BrainiacVI
 
Max The Magnificent
 
Avinash Jois
 
Max The Magnificent
 
y_sasaki
 
dwhess
 
Max The Magnificent
EE Life
Frankenstein's Fix, Teardowns, Sideshows, Design Contests, Reader Content & More
Max Maxfield

Aging Brass: Cow Poop vs. Horse Doo-Doo
Max Maxfield
38 comments
As you may recall, one of the things I want to do with the brass panels I'm using in my Inamorata Prognostication Engine is to make them look really old. Since everything is being mounted ...

EDN Staff

11 Summer Vacation Spots for Engineers
EDN Staff
11 comments
This collection of places from technology history, museums, and modern marvels is a roadmap for an engineering adventure that will take you around the world. Here are just a few spots ...

Glen Chenier

Engineers Solve Analog/Digital Problem, Invent Creative Expletives
Glen Chenier
11 comments
- An analog engineer and a digital engineer join forces, use their respective skills, and pull a few bunnies out of a hat to troubleshoot a system with which they are completely ...

Larry Desjardin

Engineers Should Study Finance: 5 Reasons Why
Larry Desjardin
45 comments
I'm a big proponent of engineers learning financial basics. Why? Because engineers are making decisions all the time, in multiple ways. Having a good financial understanding guides these ...

Flash Poll
Like Us on Facebook
EE Times on Twitter
EE Times Twitter Feed

Datasheets.com Parts Search

185 million searchable parts
(please enter a part number or hit search to begin)