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Content tagged with Design Tools (EDA)
posted in August 2007
Simberian tool takes package design out of the cold
Product News  
8/31/2007   Post a comment
Simberian has updated its Simbeor software tool for PCB and package designers by synthesizing differential via-holes geometry for impedance-controlled high-speed channels.
Wind River buys Romanian embedded software group
News & Analysis  
8/31/2007   Post a comment
Wind River Systems, Inc. has bought the outstanding shares in privately owned Romanian embedded software developer S.C. Comsys S.R.L. for $1.4 million.
Can anyone learn to design with FPGAs?
Programmable Logic DesignLine Blog  
8/29/2007   Post a comment
The answer according to ASIC designer Sven Andersson is yes, and he's documented his experiences to prove it!
How to design an FPGA from scratch
Design How-To  
8/29/2007   18 comments
When veteran ASIC designer Sven Andersson determined to learn how to work with FPGAs, he decided to create this step-by-step tutorial to teach others.
Xilinx development tools boost DSP performance
Product News  
8/28/2007   Post a comment
Xilinx's DSP development tools now deliver up to a 38 percent faster Fmax performance for multi-rate DSP designs and improved ease of use.
Agilent adds 3D-planar electromagnetic simulation to EDA platform
Product News  
8/28/2007   Post a comment
Fully integrated with the Genesys EDA platform, Agilent's Momentum GX enables RF and microwave designers to reduce design steps and speed the design and verification process for complex RF and microwave passive circuit designs.
The Dependency Problem
Blog  
8/28/2007   Post a comment
Kits offer a structured channel to sell IP and consulting services which may otherwise be more difficult to sell, and they tie the customer to the company more closely than what a tool license can do
Open SystemC Initiative Launches New SystemC Community Website
News & Analysis  
8/27/2007   Post a comment
The Open SystemC Initiative (OSCI) announced the launch of its new website for the SystemC community.
Kit From Cadence Supports Functional Verification
Product News  
8/27/2007   Post a comment
Cadence announced a verification kit for wireless and consumer system-on-chip (SoC) design.
Chip makers' dependence on software, IP growing
News & Analysis  
8/27/2007   Post a comment
Software and IP solutions took center stage at this year's Embedded System Conference-Taiwan and EDA and Test-Taiwan.
Power-Sensitive 65nm Designs Increase the Need for Transistor-Level Verification
Design How-To  
8/27/2007   Post a comment
Designers can verify AMS designs by employing a hierarchical methodology that can directly consume digital and analog blocks in their native modeling languages.
Under the Hood: Gauging standard-cell performance
Teardown  
8/27/2007   Post a comment
Standard-cell-based design has become the mainstream methodology for designing the digital-logic sections of ASICs. Semiconductor Insights shows how it used advanced imaging and algorithms to go deep inside the structure of TI's OMAP2420 SoC.
SoC technology underscores need for verification
Design How-To  
8/27/2007   Post a comment
As system-on-chip designs become more complex, verification remains the critical challenge.
Speed MATLAB by optimizing memory access
Design How-To  
8/27/2007   Post a comment
MATLAB code is often slowed down by excess memory accesses. Here's how you can speed things up.
EDA vendor Solido raises additional $6.5 million
News & Analysis  
8/27/2007   Post a comment
Solido Design Automation announced a second round of funding, saying it will be used to accelerate development of its design and verification software.
Accellera Approves Functional Design Verification Standard
News & Analysis  
8/24/2007   Post a comment
The new OVL standard improves electronic design quality and supports Assertion-Based Verification (ABV) with Verilog, SystemVerilog, VHDL and the Property Specification Language (PSL).
Vendors not the sole cause of declining DAC attendance
Blog  
8/24/2007   Post a comment
The contents of DAC's technical program are as much if not more to blame for its declining attendance than the tools featured on the exhibit floor.
Altium hits the road in the US and Canada
News & Analysis  
8/23/2007   Post a comment
New seminar series will demonstrate the potential of programmable hardware.
Kilopass Announces Embedded Non-Volatile Memory for 65 nm Processes
Product News  
8/23/2007   Post a comment
Kilopass Technology Inc. announced that its XPMTM technology is now available for 65-nanometer (nm) low power (XPM-65LPTM) and general purpose (XPM-65G+TM) processes.
Agilent debuts simulation tool
Product News  
8/22/2007   Post a comment
Agilent Technologies Inc. introduced 3D simulation technology designed to expand the accuracy of passive circuit libraries used in RF and microwave designs.
Agilent Technologies AMDS Offers Hearing-Aid Compatibility
Product News  
8/22/2007   Post a comment
Agilent Technologies Inc. announced the next release of its Antenna Modeling Design System (AMDS), containing capabilities to verify that handheld wireless devices are equipped with hearing-aid compatibility.
C-to-FPGA compiler adds six new Xilinx Virtex-5 computing platforms
Product News  
8/22/2007   Post a comment
The C-to-FPGA compiler from Impulse now supports six new Xilinx Virtex-5-based platforms for embedded and high performance computing.
Agilent upgrades antenna modeling system with hearing-aid compatibility
Product News  
8/21/2007   Post a comment
Simulating a system with AMDS can eliminate up to 75 percent of the typical modeling and setup time required by other types of EM simulators.
DFM Economics
Blog  
8/21/2007   Post a comment
I believe that the motivation for Cadence to purchase Clearshape was solely motivated by business reasons and in particular the viability of Clearshape as a stand alone company.
A Bluespec Hardware Implementation of Sudoku
Design How-To  
8/21/2007   Post a comment
Bluespec implementation of a Sudoku machine and solver illustrates how its ESL Synthesis technology effectively tackles key, contemporary System-on-Chip (SoC) development issues.
An Unclear Shape
Blog  
8/17/2007   Post a comment
Cadence's acquisition of Clear Shape has done little or nothing to clear up the situation in the DFM market.
Fluidity justifies a common platform
Blog  
8/16/2007   Post a comment
Cadence and Mentor have agreed to develop a common verification environment called Open Verification Methodology (OVM).
Cadence, Mentor team on SystemVerilog verification
Product News  
8/16/2007   Post a comment
Two EDA companies, Cadence Design Systems Inc. and Mentor Graphics Corp., have joined forces to promote a common approach to the verification of design files based on the SystemVerilog language.
FPGA-based hardware acceleration of C/C++ based applications - Part 3
Design How-To  
8/15/2007   1 comment
The team at Impulse Accelerated Technologies explain how state-of-the-art C-to-hardware tools simplify the development of FPGA-accelerated algorithms.
DVCon 2008 Announces Call for Paper, Panel and Tutorial Proposals
News & Analysis  
8/15/2007   Post a comment
The 2008 Design and Verification Conference (DVCon), sponsored by Accellera, is now accepting paper, panel and tutorial submissions.
Agilent Technologies Announces HVMOS Package for IC-CAP
Product News  
8/15/2007   Post a comment
The HVMOS extraction package, for use with Agilent's Integrated Circuit Characterization and Analysis Program (IC-CAP) software platform, enables engineers to model HV CMOS devices using Synopsys' HSPICE simulator, HVMOS Level 66 compact model.
Xilinx to work with EDA vendors on 65-nm FPGA verification
News & Analysis  
8/14/2007   Post a comment
Xilinx Inc. said it is collaborating with electronic design automation vendors to tackle FPGA design verification issues.
Ultra-high-capacity FPGA design verification tools and flows
Product News  
8/14/2007   Post a comment
Xilinx is collaborating with EDA leaders Cadence, Mentor, and Synopsys to address verification challenges for 65 nm FPGAs and beyond.
Verification methodologies keep pace with complex IP
Design How-To  
8/14/2007   Post a comment
The verification of IP cores continues getting more complex and time consuming, especially processor cores, such as CPUs, floating-point units, and digital signal processors, the subject of this story. The challenge is to design and verify a new embedded vector processor with significant enhancements over its predecessor.
LabView programming language gets updates
Product News  
8/13/2007   Post a comment
Non-overwriting back-up, simplified distributed computing and better paths to incorporate user-generated customizations are among the improvements to LabView software.
New Consortium Group Launched in Scotland
News & Analysis  
8/13/2007   Post a comment
The Institute for System Level Integration (iSLI), The Scottish Microelectronics Centre (SMC), Optocap and Photonix have announced a collaborative agreement to form a consortium group to engage with emerging technologies companies in the MEMS, biomedical, control electronics, remote sensing and advanced technologies sectors.
Embedded developers should embrace FPGAs
Design How-To  
8/9/2007   Post a comment
The use of FPGA devices is a driving factor in the success of using software to reduce hardware complexity. The technique also provides an open-ended flexibility that comes from transferring the controlling elements of a design into programmable space.
Using HW emulators to get HW/SW right the first time on the Sun UltraSPARC T1 processor
Design How-To  
8/8/2007   Post a comment
The methodology, tools, and techniques used to address Sun's UltraSPARC T1 system-level verification challenges and deliver a high quality product in a timely manner.
DDR2-400 hardware-verified reference design for Xilinx Spartan-3 FPGAs
Product News  
8/7/2007   Post a comment
Free reference design enables designers to quickly implement 400 Mbps DDR2 SDRAM interfaces with Xilinx Spartan-3 FPGAs.
Time for Structured ASIC?
Blog  
8/7/2007   1 comment
Structured ASIC methods grow in appeal as process features shrinkwith every new process node.
Analyzing dynamic voltage drop at 90 nm and beyond
Design How-To  
8/6/2007   Post a comment
As VLSI technology scales to 90 nanometers and beyond, ASIC vendors increasingly see power grid integrity issues in their designs and in the field, for two primary reasons.
Designers flow with debug flux
Design How-To  
8/6/2007   Post a comment
Embedded systems designers are facing both gradual and abrupt changes in their debugging tools. On the gradual side, tools are following general design trends and moving toward standardized, open systems. But a left turn may be in the works, as tool developers add wireless connections to embedded debug.
Making Verification Methodology and Tool Decisions
Design How-To  
8/6/2007   Post a comment
Part two of this three parts article shows how to use the new field of metric-driven engineering to objectively justify your decisions using automatically gathered data.
Fibre Channel SAN tester, analyzer speeds storage equipment design
Product News  
8/2/2007   Post a comment
Check out Agilent Technologies' dual-purpose 8 Gb/s Fibre Channel SAN tester and protocol analyzer that is designed to accelerate design and development of next-generation storage devices.
Viewpoint: Routing is key to implementing DFM within the design flow
Design How-To  
8/1/2007   Post a comment
The Viewpoint maintains that routing is required for every IC design and it is the real DFM challenge for manufacturing and yield improvement of complex SoC devices.


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Max Maxfield

The Best of the Best Videos on YouTube
Max Maxfield
2 comments
A couple of days ago, my chum Paul was visiting me in my office. He'd wandered over from his cubicle in the next bay to take a brief coffee break. This week, Paul had been admiring the ...

Jolt Judges and Andrew Binstock

Jolt Awards: The Best Books
Jolt Judges and Andrew Binstock
1 Comment
As we do every year, Dr. Dobb's recognizes the best books of the last 12 months via the Jolt Awards -- our cycle of product awards given out every two months in each of six categories. No ...

Engineering Investigations

Air Conditioner Falls From Window, Still Works
Engineering Investigations
2 comments
It's autumn in New England. The leaves are turning to red, orange, and gold, my roses are in their second bloom, and it's time to remove the air conditioner from the window. On September ...

David Blaza

The Other Tesla
David Blaza
5 comments
I find myself going to Kickstarter and Indiegogo on a regular basis these days because they have become real innovation marketplaces. As far as I'm concerned, this is where a lot of cool ...