FPGA-to-ASIC conversion with zero NRE Blog 8/31/2010 10 comments KaiSemi performs automated FPGA-to-ASIC conversion with Zero NRE, functional guarantee, and a very short cycle time; this is a full turnkey solution that is seamless to the customer.
Enhancing robust SEU mitigation with 28-nm FPGAs Design How-To 8/17/2010 Post a comment Systems designed with FPGAs benefit from significant improvements over ASICS, such as
rapid-process technology scaling and design innovation, which permit the use of FPGAs in
high-availability, high-reliability, and safety-critical systems. However, along with
technology scaling come other effects such as increased susceptibility to soft errors that
previously could be ignored. These soft errors, caused by single event upsets (SEUs), are
nondestructive and can be corrected without syst
Battle-hardened veterans of the electronics industry have heard of the “connected car” so often that they assume it’s a done deal. But do we really know what it takes to get a car connected and what its future entails? Join EE Times editor Junko Yoshida as she moderates a panel of movers and shakers in the connected car business. Executives from Cisco, Siemens and NXP will share ideas, plans and hopes for connected cars and their future. After the first 30 minutes of the radio show, our listeners will have the opportunity to ask questions via live online chat.