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posted in December 2006
Top auto electronics stories of 2006
Design How-To  
12/29/2006   Post a comment
From cosmic rays damaging electronics to the FlexRay protocol's impact on auto safety, here are the stories electronic engineers thought were tops for the year.
Multi-threaded design tackles SoC performance bottlenecks: Part 2
Design How-To  
12/27/2006   Post a comment
Coupling processor operation closely to bus and other computational demands leads to a dramatic increase in automotive vision system processor efficiency. With further tuning, optimizing the bus to work closely with the hardware threads improves performance and provides a more controllable, measurable, and predictable system latency.
Multi-threaded design tackles SoC performance bottlenecks: Part 1
Design How-To  
12/22/2006   Post a comment
Multi-threading processor core tackles both the CPU efficiency and the bus latency bottlenecks in driver-assistance/vision/navigation system SoC design.


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As data rates begin to move beyond 25 Gbps channels, new problems arise. Getting to 50 Gbps channels might not be possible with the traditional NRZ (2-level) signaling. PAM4 lets data rates double with only a small increase in channel bandwidth by sending two bits per symbol. But, it brings new measurement and analysis problems. Signal integrity sage Ransom Stephens will explain how PAM4 differs from NRZ and what to expect in design, measurement, and signal analysis.

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