New EE Times Blogger Alvaro Lopes (a.k.a. Alvieboy) introduces himself and explains how, even though he's a software guy, he designs hardware for fun.
Then another revolution occurred. This time, it was called Arduino, and everyone was pretty excited about it. I bought a few and played with them, and soon started to think to myself, "Wow, I can design a full system like this, but faster and on an FPGA, so it gives the user more flexibility." Thus, after a few years, the ZPUino was born circa 2010. This design was based on a ZPU core using the Arduino IDE and also using I/O devices whose functionality was roughly the same as Arduino. Actually, this wasn't a single ZPU core; I designed a set of ZPU-ISA compatible cores -- the ZPUino Premium and ZPUino Extreme. The target board for all of this was the one I already owned -- my trusty Spartan3E Starter Kit.
Then, believe it or not, yet another revolution occurred. This was when I came into contact with Jack Gassett, designer of the Papilio family of FPGA development boards, who has a small company that created designs based on the S3E chip. Jack and I quickly saw that we had everything to gain from each other, so I started to target the Papilio boards for my ZPUino design. Things went so well that Papilio became the main driver of the ZPUino project. We have been improving the design ever since -- supporting more devices, improving the documentation, adding software libraries, and helping all of our users to accomplish their goals.
Lots of fun projects appeared as part of all this, but two of those projects became very special -- the Soundpuddle and the RetroCade Megawing.
The Soundpuddle project started in April 2012. I was contacted by John English from Colorado, who asked if the ZPUino could do real-time signal analysis for a project he wanted to show at Apogaea 2012 (an art festival). After some initial analysis, I said it was feasible, and so we moved to implement his project on a ZPUino running on a S3E500 board (the Papilio One) from the Gadget Factory. The design boasted 16 SPI-like controllers with DMA, and it output data to huge RGB LED stripes while performing 1,024-point FFT signal analysis in software (177 bytes of FFT code). This was a huge success, and it was subsequently improved and shown at the Burning Man festival the same year. The feedback was awesome. You can see a video by clicking here.
At almost the same time, Jack started the RetroCade Synth project -- "One ChipTune board to rule them all!" It merges a few audio soft cores from the 1980s -- like the SID chip, YM2149, and Pokey -- and provides the user with a retro-synth experience. I later added full filtering support for the SID chip; this is still being tuned.
And what about the future? Well, this is something I will be blogging about here on EE Times. For the moment, I will just say that I am designing a new CPU that can maintain the same size (both FPGA and software codesize) as my current processor while providing a huge boost in performance. These things take a lot of time and a lot of design effort, which I will share with you as I walk the dangerous road that involves complex CPU designs and complex compilers. In the meantime, I would welcome any feedback and comments to this, my first blog on EE Times.