Historically, telecommunications power supplies used a stack of lead acid batteries for a nominal -48 V distributed bus. The polarity of the bus was chosen to be negative to reduce corrosion in the power distribution system. The nominal voltage of the bus had to be SELV (Safety Extra Low Voltage). SELV is defined as a protected secondary circuit designed to work under normal operating conditions and single fault conditions, such that its voltages do not exceed a safe value, limited to 60 V max. On each Line Card is one or more modular DC-DC converters with multiple outputs (usually three).
Recently the increasing number and complexity of loads has driven a system-level change known as the Intermediate Bus Architecture (IBA). In the IBA the first level distributed supply (-48 V nom.) is fed to Intermediate Bus Converters (IBC) on each card. The Intermediate Bus Converter is essentially a DC-DC transformer delivering an "intermediate voltage" of 8 to 14 V. Non-isolated point-of-load regulators convert the intermediate bus voltage to the appropriate voltages for core and I/O in microprocessors, DSPs, digital ASICs and FPGAs.
Generally speaking isolated DC-DC converters are more efficient with increasing output voltage. This is mainly due to the impact of turns ratio on power transformer leakage inductance referred to the primary, particularly in single-ended topologies such as forward and flyback. So in order for the intermediate bus converter to be most efficient it is desirable for its output high voltage to be 12 to 14 V. Also, higher output voltage implies smaller load current and a reduction in losses due to PCB trace and connector resistance. Conversely, if you look at the efficiency versus supply voltage curve for a point of load regulator you will see a peak, usually before 50% duty cycle. So it is desirable to feed the point-of-load regulator with a lower voltage, closer to its output, say, 8 to 10 V.
Another location for distributed power is in the desktop PC. In the desktop PC the 12-V supply originally provided for the hard disk drive and the floppy disk drive also fed the voltage regulator module (VRM) which supplied the core voltage for the microprocessor. At first, the microprocessor supply was 3.3 V, latterly core voltages have dropped, with decreasing CMOS feature size, towards 1 V.
Decreasing the load voltage has two effects, the nominal duty cycle of the VRM drops towards 10% and synchronous rectifiers are essential to preserve efficiency. In summary the system designer has to choose the distributed voltages for maximum efficiency of the overall system. Currently the lower-end of the intermediate bus voltage range, 8 to 10 V is favored; there is some talk of this reducing to 8 to 6 V.
Paul Greenland, Marketing Director, Power Management Products, Tel: 408-721-3210, Cell: 408-718-3149
Paul is an industry veteran with over twenty years of experience in power management design, applications and marketing. He is the author of numerous articles, training seminars and white papers, and a speaker at conferences including Power Systems World, PCIM-Europe, APEC, Intelec, ISPSD, Power-UK and the IEE colloquium on power electronics. His interests include quasi-resonant and multi-resonant power conversion techniques.