I’m currently bouncing off the walls with excitement, because this is my first day to officially take the reins as the editor of this mega-cool site.
Hi there, and welcome to Programmable Logic Designline. I’m currently bouncing off the walls with excitement, because this is my first day to officially take the reins as the editor of this mega-cool site.
First, I’d like to say a great big thank you to Carolyn Mathas, who has done so much to build up PLdesignline.com. Carolyn is now striding the corridors of power and ruling all she surveys at our Networking Systems Designline sister site.
I can’t tell you how thrilling it is to be here. Once regarded as “the little siblings” of “real” silicon chips, programmable logic in the form of today’s state-of-the-art FPGAs has enough capacity and performance to bring a tear of joy to the eye of even the most hardened of engineers. And the latest low-cost and low-power offerings are opening the doors to applications for which FPGAs would never previously have been considered.
But we aren’t going to limit ourselves only to FPGAs. What about field-programmable analog arrays (FPAAs) and field-programmable node arrays (FPNAs)? Also, what about programmable microcontrollers (like the PIC devices from Microchip) that are wending their way into embedded systems.
And it’s not just the components themselves, but the applications they find themselves in are also of interest, such as a new generation of high-performance supercomputing platforms. Currently under construction, for example, the Allen Telescope Array (ATA) in Northern California is a joint project of the Search for Extraterrestrial Intelligence (SETI) Institute and the University of California, Berkeley (UCB). In order to process the data from this array, the little rapscallions are building a 1 petaop machine using around 4,000 FPGAs (the first version of this beast is expected to be up and running by late 2006).
And then there are the tools (“Oooh, Shiny!”), such as Synplicity’s incredibly cunning graph-based physical synthesis for FPGAs, and AccelChip’s linear algebra building blocks that are so useful when it comes to designing systems using the sensor array processing technology that is currently being deployed in applications such as wireless communications systems, sonar, radar, and global positioning system (GPS) devices to name but a few.
In addition to providing you with the latest business news and product information, a key feature of the PLdesignline site is its “How To” articles, which provide the practical information needed to program, develop, and implement programmable logic devices for wireless, networking, industrial, automotive, and other design applications.
And that’s where you come in. We need your expertise. Quite apart from anything else, these “How To” articles provide a great deal of visibility for the authors and their companies. So if you’ve done anything with regard to programmable logic – devices, applications, methodologies, design tools – that you think would be of interest and use to other designers, don’t dilly-dally or shilly-shally, but instead call or email me and let’s chat about it.