Programmable Logic DesignLine Blog
I just heard from my old chum Mark Burton in the UK. Mark is the founder of GreenSoCs, which is an Open Source community aimed at building Open Source, peer reviewed SystemC Infrastructure.
Anyway, Mark was telling me that he is involved in (and wants to spread the word about) a forthcoming platform modeling and performance analysis Workshop, which is to be held December 9, 2005 from 9:00 am to 6:00 pm at the Europole Hotel, Grenoble, France. According to Mark, this workshop is applicable to designers of ASICs, Structured ASICs, SoCs, and FPGAs, so be there or be square!