I've long been fascinated by the concept of asynchronous design, but I've only ever been exposed to it from the "50,000 foot" view, until now...
I just finished reading a fascinating book called Logically Determined Design (Clockless System Design with NULL Convention Logic) by Karl M. Fant. First, Karl explains what is wrong with traditional Boolean logic, which is that it needs to be augmented with timing information in order to end up with real-world (working) designs.
Next, Karl walks us through the process of creating a new form of timing independent logic called NULL Convention Logic (NCL). Unfortunately, this first implementation is a four-value system (4NCL), which isn’t practical in the context of today's CMOS processes. Thus, Karl then evolves the system through a three-level version (3NCL), eventually arriving at a two-level (2NCL) version that we can implement.
The rest of the book describes how 2NCL can be used to implement real-world circuits, starting with simple combinational logic and then wending its way to more sophisticated constructs such as memory elements and state machines. Finally, the author describes how one might use FPGAs to experiment with 2NCL-based designs.
Truth to tell, this is a bit of a mind-boggler, but it's a very interesting read and one that I shall be mulling over for quite some time. Logically Determined Design (ISBN: 0471684783) is published by Wiley-Interscience.