I'm currently pondering the minimum instruction set for a useful CPU. Any ideas or musings would be gratefully received.
I'm still busily beavering away on the idea of my Heath Robinson Rube Goldberg mixed-technology computer (relays, vacuum tubes, transistors, fluidic logic, etc.). As you'll see if you visit the above paper, lots of folks are coming up will all sorts of mega-cool ideas.
One of the coolest concepts (at least, to my mind) is to create an emulator that runs on a PC. The idea is to be able to select which parts of the system you want to emulate and which you want to replace with a physical unit. Thus, for example, if someone constructed just the ALU out of relays, they could connect this unit (via a defined USB interface) to their PC and run it in conjunction with the rest of the emulator.
I'm hot-to-trot on creating this emulator, because it will allow everyone else to hit the ground running. But first, we have to sit down and define the CPU we intend to implement. This is going to be a subset of our DIY Calculator, but what subset?
So now I'm pondering the minimum instruction set (and addressing modes and status flags) that would still leave us with something worth having. For example, do we really need an index register? Do we need a stack and the ability to call subroutines? The trick is to follow the KISS principle ("Keep It Simple, Stupid"), but not to make it so simple that it's a pain to use (think of a streamlined super-RISC "Turing++" type machine).
For example, we probably need ADD, OR, and XOR, but we can get by without a NOT instruction because we can achieve a "pseudo-NOT" by XOR-ing with all 1s. Similarly, we don’t need NAND or NOR, because we can achieve these using AND and OR combined with our "pseudo-NOT."
If we have the two rotate instructions ROLC and RORC (rotate one bit left or right through the carry flag, respectively), we can get by without the shift instructions SHL and SHR (shift one bit left or right, respectively) because we can replicate them using the rotates combined with the logical instructions.
We defiantly need ADD (add) and ADDC (add with carry). We could probably get by without their SUB and SUBC (subtraction) counterparts (just using complement techniques), but that might be too painful.
Thoughts? Ideas? Questions? Comments? Email me at firstname.lastname@example.org. And, as usual, if you haven't already done so, don't forget to Sign Up for our weekly Programmable Logic DesignLine Newsletter.