The debate as to whether ASICs are a dying breed and FPGAs will take over the world continues unabated, but whoever wins we will still need rounding algorithms.
In a rousing commentary published on Programmable Logic DesignLine, Actel CEO John East tells us the way he sees things with regard to the FPGA Market Metamorphosis (try saying that ten times quickly!). In a nutshell, Mr. East contends that the use of ASICs has evolved into the purview of the few, but that FPGAs can take their place.
In reality, there will always be a market for ASIC implementations for applications requiring the ultimate in performance coupled with the lowest possible power consumption. Having said this, FPGA technologies are progressing in leaps and bounds, and FPGAs are now popping up is all sorts of applications that would have been inconceivable only a few short years ago.
Meanwhile, I can sit back secure in the knowledge that – irrespective as to the implementation technology selected by the system architects – some things like rounding algorithms are here to stay. The great thing about topics like these little rounding rapscallions is that there's always a different way of looking at things and there's always something new to learn. For this reason, I just posted a new introduction to a variety of Rounding Algorithms such as round-half-up, round-half-down, round-half-even, round-ceiling, round-floor
Questions? Comments? Feel free to email me – Clive "Max" Maxfield – at firstname.lastname@example.org). And, of course, if you haven't already done so, don't forget to Sign Up for our weekly Programmable Logic DesignLine Newsletter.