Unless you've been living under a rock (i.e. not visiting Programmable Logic DesignLine to hear the latest and greatest news), you'll doubtless have heard that Xilinx have just launched a new family of Virtex-5 TXT Platform FPGAs.
The Virtex-5 TXT platform consists of two devices that are claimed to deliver the highest number of 6.5Gbps serial transceivers available on any FPGA, and are fully supported with application-specific IP, development tools, and reference designs for implementing high-bandwidth protocol bridging. These devices address the needs of equipment manufacturers who are racing to deploy 100G Ethernet technology in response to exploding internet bandwidth consumption driven by IP video and enhanced media content.
Well, in addition to a New Whitepaper, I just heard that there's going to be a Free webcast (Register Here) on the Architectural Options for Implementing 100Gig Ethernet and Other Ultra High-Bandwidth Applications with a Single Virtex-5 TXT FPGA (Phew! Try saying that quickly!).
This webcast is to be held on Thursday 2 October at 11:00 am PDT, 2:00 pm EDT, 18:00 pm GMT. I'll see you there...
Questions? Comments? Feel free to email me – Clive "Max" Maxfield – at firstname.lastname@example.org). And, of course, if you haven't already done so, don't forget to Sign Up for our weekly Programmable Logic DesignLine Newsletter.