How's this for a wedge issue on a slow news week?
When Xilinx announced earlier this year that it was changing one of its foundry suppliers from UMC to TSMC for the 28-nm node, it seemed like a blow to differentiation—at least from a process technology standpoint—between Xilinx and Altera, which has been using TSMC for years.
But while Xilinx chose to go with TSMC's high-performance/low power process, Altera said this week it is going with TSMC's high-performance process.
Altera maintains that customers in the high end communications equipment market are much more concerned about performance than power. Luanne Schirrmeister, senior director of product marketing at Altera, put it this way: "In communications infrastructure, nothing is battery powered. Everything is plugged into a wall."
Xilinx, meanwhile, said the high-performance/low-power process delivers FPGAs that are 50 percent lower in static power, enabling customers to take advantage of the higher performance offered by 28-nm parts while staying within their power budgets. Xlinix also maintains that the choice of this TSMC process means the company is not sacrificing anything performance-wise, though it seems clear that for sheer performance the high-performance process would be the best choice.
In typical programmable logic fashion, both sides trotted out a host of numbers to bolster the case for their choice of process.
Altera said its benchmarks demonstrated that its 28-nm Stratix V devices get a 35 percent performance boost by going with the high performance process versus the high-performance/low-power process.
Xilinx says it evaluated the standard low power and high performance process technology variants before selecting the high-performance/low-power flavor. According to Xilinx, the 28-nm low-power variant reduces risk by using a simple evolution of the Poly/SiON 40-nm approach, but maintains that this approach is not viable for FPGAs because of its lower transistor switching speed and performance. Meanwhile, he 28-nm high-performance technology results in much higher power consumption, which limits usable performance, according to Xilinx.