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Periodic Table of Programmable Logic

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Max The Magnificent
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re: Periodic Table of Programmable Logic
Max The Magnificent   7/28/2011 9:19:51 PM
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I just used a combination of all of the suggestions above to create the first version of the table ... check it out at http://bit.ly/nyqENC

Max The Magnificent
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re: Periodic Table of Programmable Logic
Max The Magnificent   7/28/2011 6:10:20 PM
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Re element 106 -- it's shown as Sg in the table -- where did you get Cg from?

FlyByPC
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re: Periodic Table of Programmable Logic
FlyByPC   7/28/2011 6:04:21 PM
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H H-bridge He "Doesn't Pass The Laugh Test" Li Lithium-Ion battery Be Bit Error Rate B Byte C C code N NOR O Big-O F FPGA Ne Nonessential Na NAND Mg Magnet Al Alkaline cell Si Silicon, of course! P Phosphorus (as dopant) S Switch Cl Closed-Loop Ar Piracy K Karnaugh Map Ca Capacitor Sc Static Ti Texas Instruments V Voltage Cr Compiler Mn Margin (as in noise) Fe Feedback Co Coprocessor Ni Non-Inverting Cu Copper (wire, connects, etc) Zn Zen of Programming Ga Genetic Algorithm Ge Germanium diode As Asynchronous Se Semiconductor Br Break Kr Kernighan & Ritchie Rb Rebranded Sr Solder Y Wye junction Zr Zener Diode Nb Negative Bias Mo Megohm Tc Techie Ru Runtime Rh Rheostat Pd Plated Ag Engineers from Texas A&M Cd Code In In-band Sn Sensor Sb Strobe Te Testing I Current Xe Executable Cs Computer Science Ba BASIC La Layout Ce Certification Pr Plan-and-route Nd Node Pm Program Sm Sample (from manufacturer, or from ADC) Eu Eutectic Gd Good (as in A Good Thing) Tb Tube (of ICs) Dy Do-It-Yourself projects Ho Housing Er Error correction Tm Timing Yb Yottabyte (that's a lotta bytes!) Lu Luddite Hf Halt and Catch Fire Ta Tantalum (capacitor) W Wire Re Reuse Os Operating System Ir Infrared Pt Path Au Gold (wires, contacts, etc) Hg Huge (memory model) Tl TTL Pb Lead (of an IC) Bi Bit Po Port At AT commands (modems, etc) Rn Random Fr Frame Ra RapidIO Ac AC coupling Th Throughput Pa Passive U Ultraviolet Np NOP Pu Pull-Up (resistor) Am Amplitude Modulation Cm Computer Bk Borked Cf Cruft Es ESD Fm Formal Proof Md Magnitude No Normal Lr Loader Rf Reference (voltage etc) Db Double-precision Sg Signal Bh Branch Hs Heatsink Mt Microcontroller Ds Digital Signal Processing Rg Range

jrehgtkaerhu
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re: Periodic Table of Programmable Logic
jrehgtkaerhu   7/28/2011 4:13:34 PM
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Es=ESL V=Verilog, VHDL Sc=System-C Tb=Test Bench Fe=FPGA Editor

jrehgtkaerhu
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re: Periodic Table of Programmable Logic
jrehgtkaerhu   7/28/2011 4:01:46 PM
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Cd=Clock divider Cu= Quiescent Current Te=Temperature Rh=Radiation Hardened Pd=Power Dissipation Es=Power Estimator F=FPGA Pa=PAL Ga=Gate Array B=BGA Element 106 is Sg not Cg. Sg= Speed Grade

Max The Magnificent
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re: Periodic Table of Programmable Logic
Max The Magnificent   7/28/2011 1:59:41 PM
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Good one!

Max The Magnificent
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re: Periodic Table of Programmable Logic
Max The Magnificent   7/28/2011 1:59:32 PM
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It just looks like it discards newlines when you first post the comment (I have no idea why), but it looks OK when anyone else sees it or when you come back to it.

Max The Magnificent
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re: Periodic Table of Programmable Logic
Max The Magnificent   7/28/2011 1:58:18 PM
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Wow -- this is fantastic -- I was thinking each person would come up with only a few suggestions -- it looks like you are going for the whole table (although Cu = Accumulator is a bit of a stretch :-)

Evgeni
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re: Periodic Table of Programmable Logic
Evgeni   7/28/2011 3:26:49 AM
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This is a great opportunity to introduce new elements and get the Nobel prize. For example: Fp=floorplannium

Jan.Gray
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re: Periodic Table of Programmable Logic
Jan.Gray   7/27/2011 10:38:53 PM
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Max, your comment system discards newlines. Oh well. Continued: Sr,Shift Register,Soft Processor,Synchronous,Software Defined Radio, Y,Yield,,,, Zr,Zero,,,, Nb,?,,,, Mo,Module,,,, Tc,Timing Closure,Timespec,,, Ru,Routing,,,, Rh,Reset,,,, Pd,Pipelined,Posedge,,, Ag,AREA_GROUP,,,, Cd,?,,,, In,Intel FlexLogic (RIP),Inverter,Inverted,, Sn,Spartan,,,, Sb,Switch Box,,,, Te,?,,,, I,Input,IP,,, Xe,Xilinx ISE,,,, Cs,Constraint,,,, Ba,Barrel Shifter,Bus Address Register,,, La,Lattice,,,, Ce,Clock Enable,,,, Pr,Partial Reconfiguration,Place And Route,,, Nd,Node,,,, Pm,PALASM,,,, Sm,Simulation,,,, Eu,Emulation,,,, Gd,Ground,,,, Tb,Terabits/s,,,, Dy,Delay,Dynamic Power,,, Ho,Hold time,,,, Er,EEPROM,,,, Tm,Technology Mapping,,,, Yb,?,,,, Lu,Lookup table,Lucent,,, Hf,Hierarchical Floorplanning,,,, Ta,Tabula,,,, W,Waiting,WebPACK,,, Re,Reconfigurable Computing,,,, Os,Operating System,,,, Ir,Input Register,,,, Pt,Placement,,,, Au,Automation,,,, Hg,QuickSilver (RIP),,,, Tl,?,,,, Pb,PicoBlaze,,,, Bi,Configuration Bitstream,Binary,,, Po,Power,,,, At,Atmel,Antifuse,,, Rn,Relationally Placed Macro,,,, Fr,Ross Freeman,Frequency,,, Ra,LUT RAM,RAM,,, Ac,MicroSemi/Actel,Achronix,,, Th,Thermal,,,, Pa,PAL,Place And Route,Patent Wars,, U,UCF (User Constraint File),Quicklogic,Quartus,, Np,?,,,, Pu,Pullup,,,, Am,AMD,Ambric,,, Cm,Digital Clock Manager,,,, Bk,Block,,,, Cf,Configuration,,,, Es,EasyPath,,,, Fm,FMAP,Finite State Machine,,, Md,ModelSim,,,, No,Place and Route Failed!,,,, Lr,?,,,, Rf,Register File,,,, Db,Double Data Rate,,,, Cg,Core Generator,,,, Bh,?,,,, Hs,HDLs,,,, Mt,Multiplexer,,,, Ds,DSP Block,,,, Rg,Register,,,, Cn,Cyclone,,,, UU*,?,,,,

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