I just received notification from the guys and gals at Mentor that they will be holding the first webinar in a three-part series on 7 September 2011 at 9:00am to 10:00am US/Pacific, 9:00am to 10:00am Europe/London, and 2:00pm to 3:00pm Asia/Shanghai.
Click Here for more details and to register.
As FPGA and ASIC complexities escalate and the ramifications of project failure become more severe, the need for new design techniques becomes more critical. New design techniques are required not only to describe today’s large designs, but to aid in verification, implementation, reusability, reliability, agility and management, while also reducing project risk. By taking a design approach that is requirements driven and well integrated from design creation through implementation, the project-efficiency, productivity, predictability and final chip quality will dramatically improve. This webinar will present advanced chip design methods and practices that are now essential for any design project.
Who Should Attend
What You Will Learn
- FPGA/ASIC Project Leads
- FPGA/ASIC Designer Engineers
- Engineering Managers
- Documentation/Information Developers
- How a requirements driven design approach improves the quality, efficiency, and predictability of your chip design projects
- That designing to requirements will ensure functional assurance and verification closure
- That a structured and repeatable design process is good design practice and facilitates regulatory mandates compliance
- Techniques that enhance design reuse and deliver easy documentation
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