I just received an email that posed an interesting question as follows: “Hi Max, I have a question regarding who was the first PLD manufacturer. A couple of us here at work were talking about that the other day. The other guy said that Altera’s MAX PLDs were the first, but I remember the 16V8 part that I think came out before Altera’s MAX parts, although I can’t remember who first made it. Maybe you can settle the question!"
Well, before we answer this, we first have to decide exactly what we mean by “PLD”. Generally speaking, PLD stands for “Programmable Logic Device,” by which we mean a silicon chip whose function can – one way or another – be configured (programmed) by the designer of the electronic system in which it will reside.
As an additional qualification, I would tend to say that, in the case of a PLD, it’s the chip’s “physical function” that is configured; this is to distinguish a PLD from say a microprocessor or microcontroller whose function is “frozen in silicon” but that can still execute different software programs.
The first of the simple PLDs were Programmable Read-Only Memories (PROMs), which appeared on the scene in 1970. One way to visualize the manner in which these devices perform their magic is to consider them as consisting of a fixed array of AND functions driving a programmable array of OR functions. (You can see diagrams covering all of the concepts discussed here in my book Bebop to the Boolean Boogie – An Unconventional Guide to Electronics, which is an absolute bargain at only ~$29 from Amazon [grin]). In addition to acting as memory devices, PROMs were also used for a variety of other purposes, such as look-up tables or as a means to replace larger blocks of combinatorial glue logic.
When PROMs are employed to implement combinational logic, they are useful for equations requiring a large number of product terms, but they can only support relatively few inputs because every input combination is always decoded and used. This led engineers to start considering alternative architectures...
In order to address the limitations imposed by the PROM architecture, the next step up the PLD evolutionary ladder was that of Programmable Logic Arrays (PLAs), which first became available circa 1975. These were the most user-configurable of the simple PLDs, because both the AND and OR arrays were programmable.
On the downside, signals take a relatively long time to pass through programmable links as opposed to their predefined counterparts (this effect was much more pronounced in the early devices with their humongous [by today’s standards] structures). Thus, the fact that both their AND and OR arrays were programmable meant that PLAs were significantly slower than PROMs.
PALs and GALs
Thus, in order to address the speed problems posed by PLAs, a new class of device called Programmable Array Logic (PAL) was introduced in the late 1970s. Conceptually, a PAL is almost the exact opposite to a PROM, because it has a programmable AND array and a predefined OR array.
In 1983, Lattice Semiconductor Corporation introduced a suite of Generic Array Logic (GAL) devices, which provided sophisticated CMOS-based electrically erasable (E2) variations on the PAL concept.
The advantage of PALs and GALs (as compared to PLAs) is that they are faster because only one of their arrays is programmable. On the downside, PALs and GALs are more limited because they only allow a restricted number of product terms to be OR-ed together
The tail end of the 1970s and the early 1980s began to see the emergence of more sophisticated PLD devices. In order to distinguish these little scamps from their less-sophisticated ancestors (which still find use to this day), these new devices were referred to as Complex PLDs (CPLDs). Perhaps not surprisingly, it subsequently became common practice to refer to the original, less-pretentious versions as Simple PLDs (SPLDs).
Just to make life more confusing, some people understand the terms PLD and SPLD to be synonymous, while others regard PLD as being a superset that encompasses both SPLDs and CPLDs. More recently, the term PLD (Programmable Logic Device) has come to be understood to refer to SPLDs, CPLDs, and FPGAs as illustrated below:
Leading the fray were the inventors of the original PAL devices —the guys and gals at Monolithic Memories Inc. (MMI) —who introduced a component they called a MegaPAL. This was an 84-pin device that essentially comprised four standard PALs with some interconnect linking them together. Unfortunately, the MegaPAL consumed a disproportionate amount of power and it was generally perceived to offer little advantage compared to using four individual devices.
The big leap forward occurred in 1984, when newly formed Altera Corporation
(which was founded in 1983) introduced a CPLD based on a combination of CMOS and EPROM technologies. Using CMOS allowed Altera to achieve tremendous functional density and complexity while consuming relatively little power. And basing the programmability of these devices on EPROM cells made them ideal for use in development and prototyping environments.
Having said this, Altera’s claim to fame wasn’t due only to the combination of CMOS and EPROM. When engineers started to grow SPLD architectures into larger devices like the MegaPAL, it was originally assumed that the central interconnect array (also known as the “programmable interconnect matrix”) linking the individual SPLD blocks required 100% connectivity to the inputs and outputs associated with each block. The problem was that a 2X increase in the size of the SPLD blocks (equating to 2X the inputs and 2X the outputs) resulted in a 4X increase in the size of the interconnect array. In turn, this resulted in a huge decrease in speed coupled with higher power dissipation and component costs.
Altera made the conceptual leap to using a central interconnect array with less than 100% connectivity. This increased the complexity of the software design tools, but it kept the speed, power, and cost of these devices scalable.What was the question?
Sorry, I got a bit carried away there. The point is that in order to say who made the first PLD, we first have to decide what we mean by PLD. Personally I would say that the first PLD was a PROM, and that these were followed by PLAs, PALs, and GALs as discussed above.
But who made the first PROM and who made the first PLA? I’ve done my part … can anyone else provide more nitty-gritty details?
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