Design Con 2015
Breaking News
Programmable Logic DesignLine Blog

System Hyper Pipelining = 16 MCU cores on a Spartan-6 LX9 FPGA

Clive Maxfield
12/20/2012 05:39 PM EST

 11 comments   post a comment
NO RATINGS
View Comments: Newest First | Oldest First | Threaded View
<<   <   Page 2 / 2
Max The Magnificent
User Rank
Blogger
re: System Hyper Pipelining = 16 MCU cores on a Spartan-6 LX9 FPGA
Max The Magnificent   12/20/2012 5:49:13 PM
NO RATINGS
Perhaps I should have titled this "16 ARM cores running at 250MHz on a 14-Euro FPGA"

<<   <   Page 2 / 2
Most Recent Comments
Radio
NEXT UPCOMING BROADCAST
EE Times Senior Technical Editor Martin Rowe will interview EMC engineer Kenneth Wyatt.
Top Comments of the Week
Like Us on Facebook

Datasheets.com Parts Search

185 million searchable parts
(please enter a part number or hit search to begin)
EE Times on Twitter
EE Times Twitter Feed
Flash Poll