One talk I really want to attend at Design West is on floating-point processing in FPGAs...
As you may have gathered by now, I am becoming increasingly excited as – day-by-day – the forthcoming Design West 2013 Conference and Exhibition approaches (if you haven’t already done so, don’t forget to register for your Free Expo Pass).
On the one hand we have my own presentations, such as my Danger Will Robinson! talk featuring my Victorian Steampunk Radiation Suitcase (it's an old "Mark 4" -- you don;t see many of them around these days). But it's not all about me (and you have no idea how hard that is for me to say) – there are a bunch of other great talks as well.
For example, one that I really want to go to is Using OpenCL to Maximize Complex Floating Point Processing Engines in 20nm FPGAs, which will be presented by Michael Parker from Altera.
I've long been a fan of Michael's work and his writings. For example, his mini-series on Radar Basics here on Programmable Logic Designline pretty much taught me all I know about this topic. In the not-so-distant past, floating-point operations and FPGAs were not really considered to go together, but this has changed … oh how it's changed… and this is an area that is going to continue to evolve, so you can bet that yours truly will be in the front row for Michael's talk.
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