There are a lot of papers out there describing the switching waveforms in a synchronous buck regulator. However, there are not many for the boost.
When we examine the boost, we find that the labored switching transition is when the high-side FET transitions from on to off and the low-side FET transitions from off to on. We find the switch node gets a "free-ride" with the low-to-high transition. Basically, the labored transition is interchanged when compared to a synchronous buck.
Figure 1 shows the boost converter we used to generate the waveforms shown in subsequent figures. It takes a 5-volt input source and steps it up to a 12V/50-watt output. The converter uses an IC specifically designed for the synchronous boost topology. It includes timing to minimize the body diode conduction in the high-side switch; provides gate drive circuits for fast, low-loss switching; and provides for feedback control of the output.
Figure 1: Adding synchronous rectifier (Q1) to a boost converter improves efficiency. (See full-size image.)
Another key point in the circuit is the use of a very fast, low-resistance MOSFET, which also improves converter efficiency. The waveforms we will examine are for this converter operating in the continuous conduction mode with the current never reversing.
The circuit works by first turning Q2 on to build current in the inductor. Q2 is then turned off and the voltage across the inductor reverses until Q1 conducts, delivering energy to the output. For steady-state operation, the volt-seconds across the inductor must balance, which determines the simple relationship between duty factor (D), VIN and VOUT: Vout = Vin / (1-D)
Figure 2 shows the voltage measurements in the circuit during the low-to-high switch node transition. On the left, the low-side gate drive holds the low-side (LS) FET (Q2) on. The LS gate drive then transitions low, which turns the FET off. When the FET turns off, the switch-node is charged losslessly by the inductor until the body diode of the high side (HS) FET (Q1) conducts.
Figure 2. The boost converter switch node low to high transition is low loss. (See full-size image.)
After about 40 ns, the HS FET is turned on, which shorts its body diode. The significant losses that occur on this transition are the HS and LS gate drive losses and the HS body diode conduction. Interestingly, the FETs used in this design require relatively low gate drive power. They have one of the better figures of merit (the product of on-resistance and gate charge), which further augments the ability to use a low gate drive voltage, in this case 5 volts.
Body diode conduction is not as critical in synchronous boosts as it is in low-voltage buck converters. During body diode conduction, the rectification efficiency is equal to VOUT / (VOUT + Vbody diode). A 1-volt diode drop in a 12-volt boost converter is vastly different from that in a 1-volt buck converter.
The high-to-low switch node transition is nowhere near as benign. It mimics the low-to-high transition in a buck. The control FET is severely stressed. When switched on with voltage across it, it must discharge the reverse recovery charge of the body diode. It then must drive the switch node capacitance over the full output voltage. Figure 3 shows typical waveforms, which begin with the HS switch on. When the HS gate drive goes low and the switch node voltage rises, indicating body diode conduction, then all hell breaks loose as the LS switch is turned on.
Figure 3. The switch node low-to-high transition is high loss. (See full-size image.)
The LS gate drive rises to the threshold voltage of the low-side switch and its current begins to increase. The rise time of the current is limited by either the total gate resistance coupled with the gate charge, or the source inductance coupled with the transconductance of the power FET. In either case, LS current builds until it equals the inductor current at which time the current in the HS FET reverses and starts to discharge the HS body diode reverse recovery charge.
The voltage on the low-side FET is about equal to the input voltage for about half of the reverse recovery. Afterwards it tends toward zero volts as the switch node is discharged. This is the high loss transition in the boost. The LS FET is turned on with full voltage across it. The current is ramped up until it exceeds the inductor current at which time it discharges the recovery charge of the body diode. Then it finally discharges the switch node.
To summarize, just like the synchronous buck, the synchronous boost has an easy and a hard transition. The low-to-high transition is easy as the inductor's voltage reversal drives it with low loss. The high-to-low transition is not as easy; the low-side switch is turned on with the full output voltage, it must discharge a MOSFET diode reverse recovery charge, and it must drive the switch node capacitance.
For more detail on this design check out our PowerLab posting: 12V@4A Sync Boost Converter operating from Single or Dual Li-Ion Batteries. While you are there, exam some of the other 1200 reference designs that we have built, tested and documented for your use.
Please join us for the next Power Tip where we will look at the benefits of synchronizing multiple power supplies’ switching frequencies.
Check out TI Power Lab Notes for a designer’s prospective on his power supply designs.
For more information about this and other power solutions, visit: www.ti.com/power-ca.