As if the DRAM industry didn't have enough turmoil what with consolidations and wild price fluctuations, attention is now being diverted by the ongoing spat between the Advanced DRAM Technology alliance and JEDEC over the future of double-data-rate (DDR) memory.
Viewers of this column may remember an earlier report on a so-called DDR-IIa iteration that would put impedance control and line termination on the die itself. ADT backers took credit for coming up with the concept, which put JEDEC forces into a snit. The industry standards body claimed the on-die termination was already being considered within JEDEC and the ADT group was taking undeserved credit for the design.
Since the same DRAM companies and Intel Corp. are members of both ADT and JEDEC, it seemed like a strange family fight. Also since any new DRAM design, whether from ADT or anywhere, must go through the JEDEC standards processs, it was clear that nothing could be done without JEDEC anyway. But bragging rights seemed to touch off a raft of hurt feelings over the new modified DDR chip.
By the way, everyone agrees that on-chip impedance control and termination is a great thing as DDR goes to higher and higher frequencies. Above 600-MHz it almost appears essential. And JEDEC is now deliberating on an industry for the design, so the spat over authorship seems now like so much water over the dam.
You can forget about the DDR-IIa nomenclature that ADT came up with. When the design became a JEDEC deliberation, it will become simply one option in the future roadmap for double data rate memory.
That removes the ambiguity that frightened some sources that the DRAM industry could end up with further fragmentation over memory types. Especially since some vendors were solidly behind the formerly named DDR-IIa chip, and others with a vested interest in pushing present DDR designs were cool to antagonistic.
In fact, officially there isn't going to be any DDR-II moniker. The industry has settled on labeling each successive new version of DDR by the higher frequency it represents -- DDR333, DDR-400, DDR-566, DDR-600, DDR-800 and on up the speed ladder. Within each speed grade, several feature options may exist -- but essentially just as various features can be included or not on existing DDR devices.
The on-chip impedance control and termination will become just another option available on the high speed DDR grades, probably coming in a DDR600 and above.
And what about ADT, the target of so much irritation? OEMs and memory customers do have a vested interest in ADT as a possible source of design inspiration. If nothing else, they have a big stake in ADT which brought Intel and the memory chip makers together again after Intel's misguided Direct Rambus manifesto to industry.
That could be ADT's biggest accomplishment. It would be even better if Intel would relent and let the other major processor firm, archrival AMD, into the ADT fold as well.
ADT continues to meet, despite antagonists' claims that it had outlived its usefulness. If nothing else, participating companies each have a $2.5 million stake in ADT as the cost of membership. They want to get a little more for their money than just underwriting trips to fancy meeting sites around the world.
For now, it appears that all factions have signed onto a single industry DDR roadmap through 800-MHz versions. Customers can be thankful for that, even as the industry makeup of companies producing those devices is still in upheaval.