Anyone who has had the pleasure of driving a high-performance car knows that its performance at any time depends on the quality of the road, number of lanes, and the number of other cars on the same highway. By the same token, anyone who uses a computer knows that its performance, regardless of the speed of its microprocessor, is highly dependent on the bandwidth, latency, and size of the system memory, or DRAM.
MPU clock speed and DRAM bandwidth have been key drivers in enabling PCs and other devices such as notebooks, PDAs, cellular phones, and other portable devices to continually add functionality. Another key driver has been the power consumption of both the MPU and DRAM.
Power consumption has been gaining in importance with the increasing popularity of portable applications such as laptop computers and Internet appliances. Today close to 50% of all DRAMs produced are used in desktop PC applications. But by the year 2004, desktop PCs will decrease to less than 30% of total DRAM consumption, while servers, workstations, notebooks, and communications applications will increase proportionately to more than 50%.
Memory manufacturers have developed a number of approaches to deliver the bandwidth needed to optimize MPU performance. Some of these architectures are fast page mode (FPM), extended data out (EDO), synchronous DRAM (SDRAM), double-data rate (DDR), Rambus, and other proprietary architectures. As the market stands today, FPM and EDO are limited to niche applications, and SDRAM is the mainstream architecture. The proprietary Rambus architecture has successfully captured a segment of the consumer and communications market with its 1.2Gbyte/s peak bandwidth.
DDR, with clock speeds approaching 250MHz, has major support in the industry and is quickly emerging as the architecture of choice in a number of applications. Not only does DDR alleviate the bandwidth bottleneck that plagued earlier DRAM architectures, but with low-power options it also provides the power savings required in portable applications. In fact, the DDR share of the total DRAM market is expected to grow from 10% to 15% this year to about 45% by 2003, according to Semico Research Corp.
DDR essentially allows the MPU to access data at both clock edges, thus doubling bandwidth relative to SDRAM. The increase in die size, if any, is minimal, resulting in price parity between equivalent SDRAM and DDR densities. This makes DDR a cost-effective solution in most applications.
In the area of performance, benchmark studies show little margin of difference between DDR and other proprietary architectures. Yet the cost of producing a 128Mbyte DDR module is only $25, about 300% cheaper than DRAM modules of like density based on the leading proprietary memory interface. In cost-sensitive PC and consumer applications, this price difference is a prime concern to manufacturers.
Power consumption is a critical parameter in the design of portable applications, where battery life is an important selling feature. Active (memory device in full operation) and standby (memory device not operating) power consumption are key parameters that determine battery life. For equivalent densities and organizations, active power consumption of DDR is one-fifth that of proprietary DRAM. In stand-by mode, DDR consumes 40% less power than proprietary DRAM solutions.
DDR has been a clear winner over other DRAM architectures in manufacturing cost, bandwidth (in certain applications), power dissipation, and ease of use. Additionally, the manufacturing infrastructure for DDR is equivalent to that of SDRAM, allowing the memory maker to provide customers with a markedly superior product without costly tool or process changes.
It's easy to understand why every major DRAM manufacturer in the world has ramped DDR production. According to Semico, DDR shipments have doubled every month since the beginning of the year. Advanced Micro Devices Inc. and Via Technologies Inc. have already introduced MPUs and chipsets that support DDR, while Intel Corp. is expected to introduce products that can use DDR early next year. The JEDEC standards committee is currently reviewing specifications for second-generation DDR, a further sign of the industry's acceptance of this architecture.
DDR may not completely take over the DRAM market. There will always be niche applications in which alternate DRAM architectures offer specific advantages. Also, certain applications will continue to use legacy DRAM architectures, albeit at a declining rate. However, it's probably as safe a bet as you can make in this volatile industry that DDR will claim the dominant share of the DRAM market within the next two years.If you have the fastest MPU around, you may want to test it on the toll-free DDR highway.
(Farhad Tabrizi is vice president of worldwide marketing and memory products at Hynix Semiconductor Inc., San Jose.)