At this year's Design Automation Conference, Gartner Dataquest cited the growth of ASIC and FPGA usage. But conspicuous in its absence from any of the DAC technical sessions or presentations was the increasing problem caused by device package defects. While market studies may examine the economic factors of component technology, they ignore the associated risks caused by poorly designed packages.
This serves as the introduction to a series of columns that will address the packaging problems threatening to paralyze the industry. Since FPGA packages are currently the key sore point, I will focus on them. But it should be noted that other device technologies have package problems as well. Topics to be covered will include the shortcomings of current FPGA packages, the system design problems they are causing and what it will take to fix the problems.
Before delving into the specifics, it's important to get a sense of just how serious these problems are. It's only when engineers get to the point of incorporating devices into operating physical hardware that the packaging problems become visible. At this point, the problems have a disastrous impact on design and cost. Designs have to be reworked or scrapped altogether. Products are delayed beyond what market windows can accommodate. Entire companies can and do go out of business.
FPGA packaging problems are the giant iceberg that will sink many current and future high-speed products. For the FPGA vendors themselves, these package issues can become the Ford Pinto of the electronics industry: A defective FPGA package can cause an entire product design to blow up.
Watch this space for further details.
In my last column, on pc board materials (May 24, page 49), I stated that a lower relative dielectric constant, or "er," results in a thicker board. That is a glaring error. For the same trace widths, the board gets thinner as the er gets lower. However, the range of er values in practical pc board materials is so narrow that choosing a material based upon its er remains a secondary criterion for pc board substrate selection.
Lee Ritchey is the founder and president of Speeding Edge (www.speedingedge.com), a consulting firm specializing in the high-speed pc board and system design disciplines.