We had thought the promotional material for the Feb. 28 Design Currents on Power Management was clear where the articles' focus would lie: "Managing Power on Miniature Hard Drives."
We had thought the promotional material for the Feb. 28 Design Currents on Power Management was clear where the articles' focus would lie: "Managing Power on Miniature Hard Drives." The material said nothing about custom IC design. Yet, we received dozens of e-mails and phone calls on behalf of EDA tool vendors, IP vendors and ASIC vendors even programmable logic makers saying, "we do 'power management,' " and recommending interviews with company principals.
We would never underestimate the role careful chip design plays in minimizing the current consumption of a cell phone or other battery-powered handheld device. But the ability to simulate IR drops across the surface of a chip and to recommend routing patterns that minimize those drops is a fundamentally different technological focus than those of the voltage regulator and power component makers who try to make 3.0 or 2.85 volts out of 3.6, without dissipating anything along the way. To call both engineering activities "power management" is ecumenical but also confusing. If EE Times has a voice in the matter, we would recommend that the EDA and analog IC industries evolve different terms to describe what they do here.
On use of the term "power management," the interests of Synopsys, Cadence and Mentor Graphics, as well as Xilinx and Altera are now pitted against those of National Semiconductor, Texas Instruments, International Rectifier, Linear Technology and Maxim. But for system-level functions (who controls the distribution voltage in your cell phone or MP3 player), the analog companies have the right to say "power management." The voltage regulator guys have even partnered with Intel and the ARM Consortium on voltage- and-frequency scaling, on regulator-induced sleep and standby modes for those CPUs. The EDA companies, consequently, are really niche players in power management and late to the game, too. Rather than "power management," we suggest the term used by John Miklosz, former editor and publisher of Computer Design magazine, on his SoCCentral.com site, "Power analysis and optimization."
We believe, too, that many Wall Street research firms are using "power management" with reference to the IP of analog companies (Maxim and Linear Technology). But some would say Wall Street isn't that sophisticated; that, when Intel has a bad day on the stock market, our entire industry EDA vendors and chip makers alike takes a hit. "Power management," those voices say, "is what happens when Carly Fiorina gets walked to the door." If that's so, expect the term to fuel debate and confusion for some time to come.
By Stephan Ohr (firstname.lastname@example.org), EET Network technology editor.