A new methodology provides software interface to aid test development, bringing the HAL and test firmware under the auspices of the device under test, allowing for reactive software verification and moving away from "black-box" design.
Home video products have required design and verification of software-programmable hardware functions for several years. The latest generation of 65-nm SoCs integrates tens of embedded CPUs, each one running several applications.
The need to better and earlier integrate hardware and software has been evident for a long time, but because of the increase in complexity, the firmware is becoming available later and later, only making the problem worse. Too many integration issues are postponed until silicon is available.
In the past, software for the processors was always treated like a black box. Firmware engineers passed binary files and memory images to verification engineers to be run. Running firmware on a CPU has always violated a key verification premise: whatever is to be verified must be controllable and observable. This lack of control normally results in a large library of tests to be run on the processor that are difficult to sequence with the hardware interactions and that are also difficult to maintain. Without observability, it is difficult to know whether the tests actually verified what they were designed to verify.
Improving the verification methodology requires a solution that exposes all the issues between hardware and software, and one capable of doing it even when not all the firmware is available. The first step toward achieving this goal is examining the architecture of the software. Some projects don't have a well-defined structure with interfaces between layers of software. To improve the methodology for the home video projects, it is necessary to change the firmware design process and define a more formal hardware abstraction layer (HAL) to contain all the software that interfaces directly with the hardware. Once the HAL is documented and coded, verification can be done on top of this interface.
Having a HAL available and running is not enough for verification, because it needs stimulus to call the HAL functions and to confirm functionality in both the hardware and software. To create meaningful scenarios for these designs, firmware is also needed. Because of the project schedule, however, firmware is not available until later in the process. To avoid any delays waiting for firmware, special test firmware is developed to run on top of the HAL, allowing verification to begin. The test firmware is later replaced by the real firmware.
Verification begins using the test firmware and HAL by running it in the SystemC TLM environment using Incisive Software Extensions. ISX provides an interface to the software for the stimulus, checking and coverage. Combined with the hardware verification environment, the needed set of tests can be developed and coverage measured. With this environment, the design under test (DUT) now becomes the HAL and test firmware as well as the hardware design. Instead of writing directed C tests to create each hardware/software interaction, the test firmware receives its direction from the verification environment written as "e" sequences.
Reactive software verification is a key part of the methodology. ISX makes it possible to create the same reactive behavior, and to better coordinate the activity in both the hardware and software, with less software complexity. In verification, it is imperative to be able to control and monitor the design; in complex designs, this includes the software on the CPU. Software is increasingly moving away from the "black box" paradigm that allowed for little or no control, moving instead to an environment where there is close coordination between hardware and software. ISX provides the improved control and monitoring needed.
Although there is no escape from the increasing complexity between hardware and software, breaking the software down into something that is controllable and observable has been shown to improve verification in the home video application area.
Jason Andrews (email@example.com), is an architect at Cadence Design Systems. Laurent Ducousso manages STMicroelectronics Home Entertainment group's IP verification team.