Sanjaya Maniktala is back with a new installment of his popular power supply design column. The question he asks is how to make up for the erratic quality of the 3842 and 3844 switching power supply controllers now on the market? An adjustment of the RC components in the hysterysis loop allowed a power supply company to safely utilize the batch lot of jittery components they were stuck with - some 50,000 of them.
The 3842/43/44/45 series of pulse width modulators are possibly the most popular controllers for off-line applications for several years now. Originally from Unitrode (now TI), I can find 'clones' from at least 12 more semiconductor companies on the web(see if you can better the count). The list may in fact be quite endless. Their quality is however often questionable. though I do admit that their Application Information seems all rather well written (hmmm but did I read that somewhere else?).
Practically peaking these 'equivalents' can differ quite a bit at one time we even had basic functionality problems due to an insurmountable jitter from an 'alternate source' part. No amount of decoupling on any pin was helping, and it was thus obvious that it was the result of an internal noise feedthrough from the driver stage to the clock, leading to premature pulse termination and unpredictable frequency. The 3844 from the slightly more expensive vendor worked perfectly on the same board and was in fact being shipped out in millions (this was a flyback for a very well-known computer manufacturer). Now trying to return the 50,000 jittery devices to the equally well-known (though now clearly jittery) vendor was met with the familiar 'show me where in the datasheet.' attitude.
I did manage to band-aid the problem shortly after my arrival at the Singapore-based company I worked for, and they did manage to slip the bad parts into their high volume production, with no future 'ppm' issues either. Though understandably, they didn't return to the previous vendor to renew their learnings on what constitutes a 'guaranteed spec' and what is not.
This was the simple logic I applied to solve the problem: in the 3844, the clock pulse is generated by a simple RC charge-discharge cycle taking place between two fixed voltage thresholds. At the falling edge of the PWM pulse, noise was getting injected onto the ramp and could fool the internal comparator into 'thinking' that the timing capacitor had reached its upper threshold (see figure), at which point the discharge cycle would start prematurely (not shown in figure for reasons of clarity). Now what if we decreased the discharge time by decreasing the C, but simultaneously increased the R to maintain the same frequency? Now the ramp is actually slightly lower at the instant where the falling edge of the PWM pulse occurs. We can see that the noise margin has thus improved.
We must remember that normally, if there is a major change on the Primary side of an off-line power supply, we definitely need a fresh approval from Safety agencies. But this minor change in the RC combination apparently just merited a notification. End of story.
Please do write me with your personal experiences whenever you can. I will certainly acknowledge you. I can be reached at odd hours of the day and night at firstname.lastname@example.org. Steve Ohr will hear about it too!