Beyond pure process scaling which is necessary to meet today's price, power, and performance goals, chip designers have to grapple with tighter integration and product performance specialities in areas such as integrated power management, image sensing, application-specific data conversion, and enhanced display drivers.
These broader aspects of semiconductor process development may not grab the headlines as often but they are no less important to the long-term success of final products in the market.
When we talk about integration we automatically include computational performance signal processing and microcontrollers. However the other design fronts I'm also passionate about are the physical interfaces such as sensing, actuating and application-specific drive signals which allow every designer to give an SoC device his competitive edge, his speciality.
|Typical buck regulator indicating three areas where low Rdson contributes to excellent overall efficiency.|
In this predominantly analog domain, designers care about quality, about signal-to-noise ratios and about the linearity and temperature coefficients of passive components. And as core logic scales continuously, analog process technology providers have to be increasingly inventive to adapt the laws of semiconductor physics to their customers' needs.
Throw in to this situation the vital resource-and-energy saving imperative, and there are now new and exciting applications for semiconductors where voltage conversion and power efficiency become critical to commercial success.
In my view the areas most critical at this moment for power efficiency are: high performance LED drivers for the traditional domestic and industrial lighting replacement market; better and lower power point of load regulation systems for graphics, audio and visual systems; switching-mode power adaptors capable of virtually zero consumption in sleep mode and audio amplification, where power savings that class D offers will become more important as integration pressure increases.
In all of these applications the key to performance is power efficiency, and getting each transistor's on-channel resistance (the all-important Rdson) as low as possible. The ability to routinely achieve low Rdson means we can produce much smaller Mosfet and gate driver designs, especially for the lowside Mosfet.
|The green imperative is forcing the industry to look more carefully at power management performance by considering Rds_on performance.|
Using less energy is profitable too. Battery-powered devices demand precise power management at multiple sub-voltages. The power management quality of independently driven base-band, RF and display systems is a major factor in creating the users impression. If your device (cell-phone, personal media player, camcorder or personal data device) operates correctly for a longer period of time without charge, that's a tangible benefit; one which customers understand easily and are prepared to pay for.
Furthermore, intense feature-richness, a trait common to all new portable designs for the first-world, always has major implications for power management.
To give chip designers the weapons they need to engage on different fronts the industry has to maintain compatibility with existing mixed signal and baseline products, thus allowing IP to be reused on new SOC designs alongside superior integrated power management features.
Our approach is application-centric, where the input voltage and output voltage required determines one of a series of power IC technologies. From a highly-developed 5V technology process for handsets, which deals with 15V and 20V outputs, to one specifically engineered for the needs of LCD TV panels at 30V, or high-voltage power adaptors at up to 800V.
TSMC's use of BCD (Bipolar CMOS & DMOS) approach allows our customers to re-use tried and tested CMOS functions and add advanced power features without completely re-engineering existing designs.
Ken Chen is Director of Mainstream Marketing for foundry TSMC.