With the move to each new digital integrated circuit process generation, the industry roars down the same perilous road: "ASIC Deployment Costs Avenue." Inevitably, the sheer magnitude of these costs has made the ASIC option evolve into the purview of the few, available only to companies with the resources, experience, and volumes to justify the astronomical development costs and risks. At the same time, design complexity has also increased. So, ASIC respins have become not only more common, but more costly as well.
Fortunately, over time, field-programmable gate arrays (FPGAs) have grown in capacity, performance, and capability, incorporating more and more of the system functionality and providing desirable flexibility to the system. Naturally, this metamorphosis in the FPGA market has given designers reason to pause and ask: "Can I use an FPGA instead of an ASIC to save time and money?"
Is the one-for-one replacement of FPGA for ASIC akin to driving the wrong way down a one-way street?
We believe the answer is a resounding "No!"
For you see, if the "ultimate destination" of the semiconductor business has been the savings of power, area, time, and dollars for the last few decades, today's economics and time-to-market pressures reinforce these requirements, but also force designers to look for solutions that offer flexibility, security, and reliability. This laundry list of "must haves" is therefore, creating a large opportunity for FPGAs where ASICs have traditionally played despite long design cycles and high costs. In fact, analysts predict the programmable logic device (PLD) market will exhibit roughly 235 percent growth between 2002 and 2008 &ndash from $2.3 billion to $5.4 billion.
The challenge, then, is to make FPGAs more "ASIC-like," allowing for easier travel along the path to success. This means low overall system cost, low unit cost, and low power consumption. It requires "ASIC-like" characteristics, such as improved design security and reliability, a single-chip solution, and for the device to be live at power-up.
As a result, there is significant opportunity for FPGA companies, in particular, to address those ASIC needs – to help customers not only meet their specific power, footprint, and resource requirements, but also gain significant advantages on the competition and protect against design theft and firm errors. While traditional SRAM-based FPGA solutions fall short of these metrics, nonvolatile flash-based FPGAs are inherently poised to meet the challenge – all with the "feel" of an ASIC.
Further, the utilization of nonvolatile, single-chip FPGA technologies may be the answer for designers of systems with limited board space as well as power, time, and cost restrictions. For example, with the integration of mixed-signal analog, embedded flash memory, and FPGA fabric in a single mixed-signal FPGA, designers can apply the benefits of programmable logic to application areas that have traditionally been served by either costly and space-consuming discrete analog components or mixed-signal ASIC solutions. In addition, when used in conjunction with soft industry-standard processor cores, designers are able to focus on adding unique features and enhancing end-product value.
Nonvolatile FPGA technologies – like general-purpose flash FPGAs or the aforementioned mixed-signal variety – bridge a significant gap between the traditional FPGA and ASIC camps. No longer "must" an ASIC be utilized because FPGAs do not have the capacity, performance, and capabilities to incorporate system functionality. In fact, with the ASIC-like features offered by today's flash-based FPGAs, it is easy to see why market analysts believe that double-digit growth rates are sustainable.
Over the next twenty years, as the industry navigates the process curve and designers continue their quest to save power, time, board space, and dollars, it is critical to mentally map the ever-growing obstacles in our path to success, including the cost of ASICs. As FPGAs offer more capacity, performance, and capability along with increased integration and flexibility, these solutions provide a less painful route to design success.
John East, CEO, Actel Corporation (www.actel.com.