As the recovery takes off, Jasper Design Automation said it is excited by the expanding role formal verification technology will play as IC design sizes continue to grow while market windows shrink. One of the facilitators of this paradigm is IP design and reuse, because now virtually all design starts are SoCs that could never be completed without internal and/or third-party IP.
Market analyst Future Horizons recently predicted that semiconductor sales are poised to increase 20 percent to 30 percent over the next two years due to a combination of compelling factors, including an insatiable demand for all things electronic worldwide.
As this recovery takes off, we are particularly excited by the expanding role formal verification technology will play as IC design sizes continue to grow while market windows shrink. One of the facilitators of this paradigm is IP design and reuse, because now virtually all design starts are SoCs that could never be completed without internal and/or third-party IP.
IP reuse within semiconductor companies has more than doubled in the past 10 years, and it is clear that trend is here to stay. Internally, companies are constantly improving how they leverage both internal and third-party IP. Our CEO, Kathryn Kranen, recently addressed this topic in a lively IP-ESC panel that explored how leading companies are maximizing their effectiveness at using IP. This calls for continued investment in their design, configuration, and verification infrastructures to streamline IP integration, speeding time to market. Just as important is how IP vendors and EDA companies can improve their products to facilitate IP integration and reuse for their customers.
Formal plays an essential role by providing absolute certainty that there are no hidden bugs, so IP users can confidently integrate these parts into their designs. In addition, reusable IP needs to be highly configurable and formal has the unique ability to check for all possible configurations while also ensuring compatibility with different operational modes.
Another breakthrough area is formal verification solutions that let designers explore the functionality of a design and capture its design intent in a persistent and executable database that contains configuration modes, transaction-annotated waveforms representing design functionalities, and more. This database, along with a formal-technology based analysis system, can then be used by the IP consumer to facilitate comprehension, modification and re-verification.
Jasper's ActiveDesign with Behavioral Indexing exemplifies how these results can be achieved by accelerating design, development and debug, automating knowledge transfer across the design and verification teams, leveraging the value of existing designs and IP, and promoting efficient design reuse.