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Book review: CHIPS 2020

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Or_Bach
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re: Book review: CHIPS 2020
Or_Bach   2/7/2012 4:04:18 PM
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Monolithic 3D provides ~10,000x more vertical connectivity. 3D IC as an alternative to 0.7x scaling is about maintaining Moore Law of doubling the amount of devices but instead of making them smaller just have them in two layers (and tomorrow 4). To do so we need very rich vertical connectivity ~ comparable to horizontal connectivity.

resistion
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re: Book review: CHIPS 2020
resistion   2/7/2012 12:30:13 PM
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Rather timely since 20 nm development is pretty much wrapped up. @Or_Bach: Any thoughts on TSV vs. monolithic for 3DIC?

Or_Bach
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re: Book review: CHIPS 2020
Or_Bach   2/7/2012 12:33:13 AM
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Yes, it is clear that the conventional 0.7x scaling down that our great industry has enjoyed has now reached the phase of diminishing returns. The escalating cost of litho, the escalating cost of process R&D, the escalating interconnect delay, the issues of device variations and few other factors all point to the diminishing advantages of scaling down. But Moore's Law can keep on going as monolithic 3D is becoming practical. In fact, NAND Flash companies are already buying equipment for monolithic 3D products. Applied Material's blog “3D for Dummies” http://blog.appliedmaterials.com/3d-chip-technology illustrates it and MonolithIC 3D Inc. has released multiple flows for producing monolithic 3D logic and memories. MonolithIC 3D would enable the industry to continue the pace of doubling complexity while reducing cost and power. Reduction of cost would derive from the reduction of equipment cost and the ability to process multiple layers using the same litho step. In short: we can continue to increase integration, but we might need to change the way we do it.

Or_Bach
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re: Book review: CHIPS 2020
Or_Bach   2/7/2012 12:31:55 AM
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Yes, it is clear that the conventional 0.7x scaling down that our great industry has enjoyed has now reached the phase of diminishing returns. The escalating cost of litho, the escalating cost of process R&D, the escalating interconnect delay, the issues of device variations and few other factors all point to the diminishing advantages of scaling down. But Moore's Law can keep on going as monolithic 3D is becoming practical. In fact, NAND Flash companies are already buying equipment for monolithic 3D products. Applied Material's blog “3D for Dummies” http://blog.appliedmaterials.com/3d-chip-technology illustrates it and MonolithIC 3D Inc. has released multiple flows for producing monolithic 3D logic and memories. MonolithIC 3D would enable the industry to continue the pace of doubling complexity while reducing cost and power. Reduction of cost would derive from the reduction of equipment cost and the ability to process multiple layers using the same litho step. In short: we can continue to increase integration, but we might need to change the way we do it.

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