SAN FRANCISCO – It’s the beginning of the end for the fabless model according to Mark Bohr, the man I think of as Mr. Process Technology at Intel.
Bohr claims TSMC’s recent announcement it will serve just one flavor of 20 nm process technology is an admission of failure. The Taiwan fab giant apparently cannot make at its next major node the kind of 3-D transistors needed mitigate leakage current, Bohr said.
“Qualcomm won’t be able to use that [20 nm] process,” Bohr told me in an impromptu discussion at yesterday’s press event where Intel announced its Ivy Bridge CPUs made in its tri-gate 22 nm process. “The foundry model is collapsing,” he told me.
Of course Intel would like the world to believe that only it can create the complex semiconductor technology the world needs. Not TSMC that serves competitors like Qualcomm or GlobalFoundries that makes chips for Intel’s archrival AMD.
Intel used the Ivy Bridge event to spin the tale of how part of the secret to its success is its close partnership between process and chip designers.
Kirk Skaugen, the new general manager of Intel’s client PC group, moderated a Q&A with Bohr and Brad Heaney, the Ivy Bridge program manager. In addition to working together on Intel’s first CPUs using 3-D transistors, the two collaborated on Intel’s first processors using high-K metal gate technology.
“Being an integrated device manufacturer really helps us solve the problems dealing with devices this small and complex,” Bohr said in the Q&A.
I don’t doubt that for a minute. Since the dawn of submicron design, EE Times has been writing about the need for ever closer collaboration between chip and process designers. An Nvidia physical design exec underlined the same point in a recent talk at Mentor Graphics’ annual user group meeting.
But Bohr stretches the point too far when he says the foundries and fabless companies won’t be able to follow where Intel is going. I have heard top TSMC and GlobalFoundries R&D managers make a good case that 3-D transistors won’t be needed until the 14 nm generation. For its part, TSMC said at 20 nm there is not enough wiggle room to create significant variations for high performance versus low power processes.
I neglected to ask Bohr whether Intel has separate high performance and low power processes in its 22 nm technology. (Anyone from Intel is welcome to chime in here.)
However, in an open Q&A, Bohr said Intel has completed work on an SoC-specific version of its process technology. It plans going forward to have an SoC variant a quarter or two after each main process is complete.
For its part, Qualcomm would not provide its opinions on TSMC’s 20 nm plans. The company did say in its recent quarterly earnings call it can’t get enough 28 nm technology from TSMC to meet product demand, so it is working to develop multiple new sources it expects will come online later this year.
That’s a big opportunity for a GlobalFoundries, UMC or other fabs to step up. Given the close sharing of design details required to make 28 nm SoCs, it’s more of a risk than an opportunity for Qualcomm to work with Samsung’s foundry folks, Bohr said, given Samsung has its own Exynos mobile SoCs.
I asked Bohr to whom Intel is providing access to its 22 nm process besides two announced partners—Achronix and Netronome. He only said that Intel does not want to be in the general foundry business, but it makes its technology available to a few strategic partners.
Intel has no monopoly on smart process technology engineers and designers. But it does have some brilliant ones, and it has learned to market them smartly. Bohr and Heaney even appeared yesterday in another one of Intel’s playful videos shrinking the two engineers so they could tour the insides of an Ivy Bridge chip.
Looking ahead, Bohr said Intel has finished characterizing its next-generation 14 nm process using immersion lithography. It even has “encouraging results” suggesting it will be able to use immersion litho for the 10 nm node that is still in early planning phase.
“We think we have a [10nm] solution using immersion lithography—we’d love to have extreme ultraviolet [EUV] lithography, but we are not counting on it,” said Bohr in the event Q&A.
As a follow up, I asked whether Intel has other new process tricks like 3-D transistors at 14 and 10 nm. His answer: “Yes!”
I love it when companies celebrate and provide access to their top engineers. But I hate it when they are so well trained by their PR departments.
Skaugen (left) queries Bohr and Heaney (right) on their process/chip design collaboration.
Absolutely, what Mr Bohr is saying here is pure chauvisnism IMO. Instead of predicting the demise of the fabless/foundry model, he should have simply predicted much closer tie-up between fabless companies and foundries in the future e.g. through joint ventures.
I'm surpised to see such grandiose claims from an Intel spokesman. They have a huge talented work force and history doesn't validate a previous commenter's claim that they don't innovate. As long as your factories are running and you've got high margin products, no need to dump capacity to others and enable your competitors.
bohr's view is narrow in the sense that he assumes high quantity products. however, once the scaling ends slowly, the design matters more, and increasingly differentiated designs are used for different applications. NRE will matter a lot.
bohr should be worried about having only one customer.
Intel is making fun of TSMC for limiting the process variants, but the they could stand to look in the mirror. They pretty much fill their fabs with a single product variant. I agree that very advanced products on very advanced processes will probably have to be co-developed for each other. This will cause challenges for some companies, but not most. Most foundry customers run a variety of products in smaller run rates and with more process variants. They could not ammortize the cost of doing it themselves and need a foundry model. I wouldn't be surprised to see one or two companies head back the other way or engage in a JDP model with a foundry.
Intel is basically telling Wall Street (thru the conference) AMD, Qualcomm and the rest of the industry can't compete because they're fabless and dependent on inferior technology so we deserve a better stock valuation. Ho humm. Haven't we heard this basically at every technology node?
given the fact that not many companies can develop technologies at 2X and 1X nodes due to high monetary cost, going solo is not an option. Either collaboration or going fabless is an option. Intel is surely ahead by 2 to 3 years as far as technology is concerned.