One of the questions I get asked most often about ARM big.LITTLE processor technology is, "how complicated is the software?"
In big.LITTLE processors, there are two distinct CPU clusters in the applications processor subsystem, one designed for optimum energy efficiency and the other designed for maximum performance in the device power budget. Software dynamically and seamlessly moves to the right-sized ARM Cortex core, either big or LITTLE, for the work at hand. This sounds quite complicated, but in reality it is an extension of the operating system power management software in wide use today on mobile phone SoCs.
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Dynamic Voltage and Frequency Scaling (DVFS) is a technique employed by pretty much every mobile phone in production today. In this approach, the voltage and frequency of the applications processor are scaled based on the performance needs at a particular instant in time. This is implemented in Linux, for example, in a kernel space driver called cpu_freq. This driver samples the operating system load every 50 milliseconds or so – and based on the OS load and the power policy – makes a decision to ramp up, ramp down, or stay at the same voltage and frequency operating point. In this way, the applications processor can respond dynamically to the performance needs of the device, and save energy during periods where the processor is on but waiting for input, lightly loaded, or dealing with background activity. Big.LITTLE processor technology makes use of these existing DVFS mechanisms to save even more energy.
There are two flavors of big.LITTLE software in development by ARM and its partners, and both take advantage of existing DVFS mechanisms in some fashion. The two software models for running a big.LITTLE processor will be described in greater detail in a paper I'm presenting at the upcoming ARM TechCon event at the end of October, but I'll briefly introduce the concepts here.
When a big.LITTLE processor is running, the DVFS drivers samples the load of the system as normal, and issues commands to the system power controller to move voltage and frequency up and down in the same way as current mobile applications processors do today. In the first software model, CPU migration, when the DVFS driver reaches the peak operating point on the LITTLE CPU cluster, it has the ability to move to higher operating points, on the big processor cluster. The DVFS driver is modified in the case of big.LITTLE to initiate the migration of software to the big cluster. Because the DVFS drivers already sample load on a core-by-core basis in multi-core systems, the CPU migration software is able to handle migration to big and LITTLE on a core-by-core basis, and effectively allow a mix of big and LITTLE cores to run at the same time if the workload demands such a mix.
David Patterson, known for his pioneering research that led to RAID, clusters and more, is part of a team at UC Berkeley that recently made its RISC-V processor architecture an open source hardware offering. We talk with Patterson and one of his colleagues behind the effort about the opportunities they see, what new kinds of designs they hope to enable and what it means for today’s commercial processor giants such as Intel, ARM and Imagination Technologies.