One way to save Moore's Law from an unpleasant and industry-disrupting demise is for manufacturing process technology developers to make a series of changes at a given node – say 20-nm – but label each successive change with a smaller number.
In that way double patterning of deep immersion lithography can continue to produce chips that are in processes technologies that are labeled 16-nm, 14-nm, 10-nm and so on, thereby keeping Moore's law moving forward.
And as long as some feature on the chip can be measured at the
appropriate dimension it should be possible to find a way to justify the
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Of course, the IC die-area savings and cost advantages that we have become used to from previous process node transitions would not accrue with these forthcoming node transitions. However, as chip designers at the leading edge are becoming more interested in power savings than area savings as long as the successive process nodes produce ICs with lower power consumption all may be well.
Hi Kris, Here's a link for Gordon's paper, http://av.r.ftdata.co.uk/files/2012/08/IS-U.S.-ECONOMIC-GROWTH-OVER-FALTERING-INNOVATION-CONFRONTS.pdf
In my opinion, Gordon is way to pessimistic and his 100 year forecast just doesn't add up. He sounds like Hansen back in the 1930's who, with the passage of time, was proven wrong as well.
There is the other Moore's law: cost per acre of finished chip remains constant.
In some ways these are dual. As ways are found to reduce dimensions, and if that delivers functional benefits, then there will be a tendency to aim for similar costs to cram more function into the same size.
But as factors like power density, leakage, and other limits tend to eliminate the advantage of making smaller chips we could see a trend to making cheaper chips. After all, the Si only costs a few cents per sq cm. If it starts to make sense to produce each sq cm more cheaply (and tricks like vertical connection allow us to package them small and keep connection distance low) then we will continue to see increased functionality at falling cost.
Just like we have had tremendous functionality and even performance growth since GHz scaling stalled a decade ago, we will continue to see functional and performance growth for a long time even if feature size stalls. The ingenuity and competition will simply shift into other dimensions.
There is a economics paper by the National Bureau of Economic Research by Robert J. Gordon titled "Is U.S. Economic Growth Over? Faltering Innovation Confronts the Six Headwinds". This paper describes how Moore's Law fueled the third of three "industrial revolutions" and now that it is coming to a close, will result in a completely different worlds from an economic perspective. Interesting reading. I don't agree with all of his conclusions, but I do think he has captured what we've all been seeing in the electronics industry for the past five years.
EUV saturated so much of the total R&D spectrum that little bandwidth was left for alternative approaches. The decision to stick with EUV defies logic, especially in an industry that is so careful about managing risks. The fact that EUV sources are still at this late date 10 to 20 times too weak for HVM should indicate that the technology is not tractable. Furthermore, if a true 200 watt source was available for long term testing, the exposure tool would certainly have to undergo major changes to accommodate the thermal loading.
Precisely the type of dodgy thinking that led to the demise of British manufacturing industry since the '60s and their living off W. Europe and the US as low-cost English speakers, middle-men and parasites who lie to start wars.
This does sound like smoke and mirrors, but Moore's law doesn't account for getting the same number of "better" things. For instance, if you get the same number of transistors as the last node but they use 50% less power, how do you measure that in terms of Moore's law? If you stack two chips on top of each other to get twice and many transistors in the same "space" does that count?
To acknowledge the end of Moore's law is to acknowledge what most of the semi industry has known for the past decade - the business model made possible by scaling is now obsolete. More than Moore will be upon us all. Peter mentions low power since mobile is now king, but what if you aren't in the mobile market? I think there is room for many different kinds of innovation.
David Patterson, known for his pioneering research that led to RAID, clusters and more, is part of a team at UC Berkeley that recently made its RISC-V processor architecture an open source hardware offering. We talk with Patterson and one of his colleagues behind the effort about the opportunities they see, what new kinds of designs they hope to enable and what it means for today’s commercial processor giants such as Intel, ARM and Imagination Technologies.