Flash memory maker Macronix has come up with a way to improve the cycling endurance of flash memory from 10,000 cycles to in excess of 100 million cycles which it is due to present at the International Electron Devices Meeting of 2012.
The event is almost upon us and the paper from Macronix International Co. Ltd. (Hsinchu, Taiwan) looks set to be one of the most intriguing and one that could simplify flash memory deployments such as in solid-state disk drives.
It is well known that flash memory endurance reduces with scaling. So read/write cycling endurance which used to be at the levels of 100,000 to 1 million cycles in the early days of flash non-volatile memory has now reduced to 10,000 cycles or less. This has, in turn, produced requirements for complex software algorithms to implement wear-leveling in flash-based memory systems and to provide extra memory for some applications.
The paper (9.1) is entitled: Radically extending the cycling endurance of flash memory (to >100 million cycles) by using built-in thermal annealing to self-heal the stress-induced damage.
The technique seems to borrow something from phase-change memory, which uses a heating cycle to reset the material phase of the chaclogenide material that offer variable resistance.
In the case of flash memory repeated program/erase cycles degrades the tunnel oxide which separates the floating gate where charge is stored. According to the paper abstract Macronix researchers observed that heating the oxide could repair the damage but was impractical at the macroscopic level. However, a scheme could be implemented by including memory cell heaters that provide thermal annealing exactly where it is needed.
The Macronix engineers have modified a single-ended word line to a double-ended structure so that current could be passed through the gate to generate Joule heating. Temperatures of more than 800 degrees C were generated adjacent to the gate, the abstract states. It also states that endurance cycles of more than 100 million program-erase cycles were achieved with "excellent data retention." The researchers also noticed that the heating enabled faster erasing.
Click on image to enlarge.
Structure of diode-strapped wordline with local interconnect used to connect to metal heat plates. Source: IEDM advance program.
Of course the devil is in the detail and it remains to be seen whether an annealing cycle needs to be added every read/write cycle and thereby impacts access times or can be called up every few thousand cycles but which thereby retains some software complexity.
Nor has it yet been related as to what process node the annealing flash memory has been implemented although there is a hint in the diagram of 30-nm. Nor do we yet know what it will it do for electromigration of materials in the device.
It is unlikely that this technique will help flash memory scale but it could be useful for vertical NAND flash memories and and it is definitely a paper and a technology development to look out for.Related links and articles:
News articles: IEDM targets next-gen memory technologies
Intel, rivals gird for IC manufacturing showdown
Intel describes 22-nm SoC process, not chips
Intelís Haswell boosts battery life, graphics