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IEDM goes deep on 3-D circuits

Don Scansen
12/10/2012 05:30 PM EST

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krisi
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re: IEDM goes deep on 3-D circuits
krisi   12/10/2012 6:56:32 PM
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Interesting summary Don...looking forward for more details from IEDM this week...Kris

Don Scansen
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re: IEDM goes deep on 3-D circuits
Don Scansen   12/11/2012 4:36:12 AM
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Thanks Kris. I will see what else I can dig up.

docdivakar
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re: IEDM goes deep on 3-D circuits
docdivakar   12/11/2012 7:46:05 PM
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The paper on reliability discussing the "Effect of Local Deformation Caused by Cu-TSVs..." has important implications to the placement of TSV's and the keep-out rules. This is something that is still developing and has many process-dependent influences (via middle or via last etc.) as well as type of stacking (die to die vs. wafer to wafer) and the die thickness. Regrettably I could not attend IEDM this year but would be great to see more review articles as Kris also comments above. MP Divakar

krisi
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re: IEDM goes deep on 3-D circuits
krisi   12/12/2012 3:50:54 PM
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thank you Don and doc Divakar...any more news from IEDM anyone?

Zeev00
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re: IEDM goes deep on 3-D circuits
Zeev00   12/13/2012 5:59:03 AM
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I am somewhat uncomfortable pointing this out, but the Stanford/Monolithic3D/Rambus IEDM paper (14.2) about heat extraction has absolutely nothing to do with TSVs. It talks about heat removal using inter-layer-vias of the Power Delivery Networks in monolithic 3D devices that have no TSVs. Just sayin'

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