Breaking News
Blog

London Calling: Are ARM's big-little days numbered?

NO RATINGS
Page 1 / 2 Next >
View Comments: Newest First | Oldest First | Threaded View
Page 1 / 2   >   >>
ChipMaster0
User Rank
Rookie
re: London Calling: Are ARM's big-little days numbered?
ChipMaster0   4/20/2013 7:10:39 PM
NO RATINGS
What's next for big.Little is that it just got 20 licensees, and Renesas will even take it into the car chip market, which should be another booming chip market, soon: http://techdomino.com/renesas-big-little-r-car-h2

Pat2010
User Rank
Rookie
re: London Calling: Are ARM's big-little days numbered?
Pat2010   1/24/2013 8:59:06 PM
NO RATINGS
Mhhh, more interesting techniques exit like body biasing. Check the literature on conferences I would say. Though such techniques are not always possible for everyone at a foundry - advantageous for firms with own process and modelling departments.

Peter Clarke
User Rank
Blogger
re: London Calling: Are ARM's big-little days numbered?
Peter Clarke   1/24/2013 12:15:50 PM
NO RATINGS
I'll also throw this into the mix. At highest voltage there also tends to be an increase in non-dynamic (leakage) power consumption. BUT leakage consumption is a bigger proportion of overall IC power consumption when a chip is idling at low voltage.

Peter Clarke
User Rank
Blogger
re: London Calling: Are ARM's big-little days numbered?
Peter Clarke   1/24/2013 12:13:47 PM
NO RATINGS
You seem to be treating DF and DV as if they are fully independent. But you can only achieve full DF scaling at top voltage. And at reduced voltage you cannot do much DF scaling.

help.fulguy
User Rank
Manager
re: London Calling: Are ARM's big-little days numbered?
help.fulguy   1/23/2013 5:25:30 PM
NO RATINGS
ARM has no choice. When your Dual core A15 power (just for core) comes at 6W, how do you compete against Intel Atom, when they can match performance and have lower power? ARM is losing the power battle. ARM is no longer power performance efficient. Intel took the lead

mvox100
User Rank
Rookie
re: London Calling: Are ARM's big-little days numbered?
mvox100   1/23/2013 5:06:21 PM
NO RATINGS
Unfortunately, from the perspective of energy consumption, DF really doesn't help, even though it does lower the power (energy consumption per second). In fact, slowing down the frequency will only increase the total energy consumed for the same task as it increases the execution time (due to the extra energy consumed in the "supporting" blocks to keep the core running).

GLink
User Rank
Rookie
re: London Calling: Are ARM's big-little days numbered?
GLink   1/23/2013 4:51:48 PM
NO RATINGS
I would hesitate to claim that it's just DVFS. DFS works primarily on dynamic power, and does little for overall energy consumption, while DVS is where the real meat is, affecting both leakage and dynamic consumption strongly. At the same time, as voltage drops, frequency must also often be compensated to assure proper operation. Big.Little is different in that by having two entire cores, you can also use separate fabrication parameters for both. Because the two cores are independent entirely, it's possible for the .Little processor to be fabricated with a high threshold voltage in mind for low leakage during the expected long on-times. The Big. processor can then be fabricated with a more aggressive process and less concern about leakage. Rather than designing for average case, you can design for expected case for both processors.

sranje
User Rank
Manager
re: London Calling: Are ARM's big-little days numbered?
sranje   1/22/2013 8:27:45 PM
NO RATINGS
How about use of Digital power mngmt (Intel's term is IVR - for integrated voltage regulator - to be used in multicore Hasswell processor family) and fine tune each core.... How many PMU/PMICs is Samsung's Exynos Octa 5 using?

Hasmon
User Rank
Rookie
re: London Calling: Are ARM's big-little days numbered?
Hasmon   1/22/2013 6:22:43 PM
NO RATINGS
Oh come on...there ought to be a system-wide solution to this problem. Some types of code (simple logic, event handling etc.) can probably run on the baby processor. Some larger code (iterating through large data structures, block data handling, signal processing etc.) can be done on the larger core. These are 2 different types of programming...one needs to optimize latency while the other might need to optimize throughput...but due to the prevailing convention we use a single programming language and a single processor for both types of data. If arm wants to tackle this they should invent a new type of programming language or virtual machine or something, and assign threads to different processors. Then let the VM or OS decide which core to turn on, based on software demand.

bgees
User Rank
Rookie
re: London Calling: Are ARM's big-little days numbered?
bgees   1/22/2013 6:38:34 AM
NO RATINGS
Bunch of Bollocks! Peter gotta get his facts straights and realize it was not ARM who invented Big Little! It was really an ARM customer that started it, then ARM took the concept, enhanced and started gorilla marketing campaign.

Page 1 / 2   >   >>
More Blogs
Cell-aware testing can improve test coverage in simulations, but there are costs.
Why is the National Highway Traffic Safety Administration such a slacker at enforcing safety laws? A US Senate subcommittee wants to investigate.
Apple and Samsung are poised to ship their first smartphones using 20nm mobile processors, but they are applying the silicon technology in radically different ways.
Dilbert remains a great source of comic relief, but the misimpressions from that comic about marketing should be viewed as nothing more than a spoof.
Perhaps this is the natural order of business -- Darwinism and RadioShack's impending demise open the door wider for companies like SparkFun and Adafruit to grow.
Top Comments of the Week
August Cartoon Caption Winner!
August Cartoon Caption Winner!
"All the King's horses and all the KIng's men gave up on Humpty, so they handed the problem off to Engineering."
5 comments
Like Us on Facebook

Datasheets.com Parts Search

185 million searchable parts
(please enter a part number or hit search to begin)
EE Times on Twitter
EE Times Twitter Feed
Radio
LATEST ARCHIVED BROADCAST
David Patterson, known for his pioneering research that led to RAID, clusters and more, is part of a team at UC Berkeley that recently made its RISC-V processor architecture an open source hardware offering. We talk with Patterson and one of his colleagues behind the effort about the opportunities they see, what new kinds of designs they hope to enable and what it means for today’s commercial processor giants such as Intel, ARM and Imagination Technologies.
Flash Poll