EVE's point of view and more considerations on the acquisition of Synplicity by Synopsys.
After I wrote about Synopsys acquisition of Synplicity (see My blog ) a person from the investment community wrote to me to ask about the antitrust / anticompetitive effects of this transaction. The answer is that there are none because the number of players in the specific market has not changed. Synonpsys simply replaces Synplicity in this particular market. So there is really not enough ground to start an antitrust procedure because there is no consolidation and the level of difficulty for a third party to enter this market has not changed significantly. Synopsys sales organization will have to prove that it can, in fact, either maintain or increase market share after the acquisition.
More interesting, though, is to look at the effect of the acquisition on the total EDA market, as another reader encourages me to do. Here things are getting interesting, because Synplicity has a position in the prototyping market, due mostly to its acquisition of HARDI Electronics last year. The result is that the acquisition enables Synopsys to strengthen its position in the prototyping market segments because it will increase the value of its Virtio acquisition a couple of years ago. This will certainly strengthen Synopsys offering in the ASIC design space. Mentor is of course an important player in the market, and has just introduced another product targeting the rapid growing of multi-core design. (see Mentor's Codelink).
There is an important, although often glossed over, distinction between the terms "virtual prototyping" and "virtual platform". Virtual prototyping is a design technique used to develop systems on chip, some of which are platforms. A virtual platform is a model of a computing platform, offered by companies like ARM and MIPS for example, that may be used in virtual prototyping.
Two issues continue to rattle in my mind as I thought more about the impact of the acquisition on the EDA industry. Should Cadence continue to serve the virtual prototyping market solely with its Palladium and Xtreme acceleration/emulation products, and how would EVE react to the acquisition?
As for Cadence, I do not pretend to have a direct channel to the seat of decision making in that company. In fact, it is the only large EDA company that habitually makes it as difficult as possible for me to talk to any of its executives. But were I in one of the numerous pairs( according to Michael Santarini who did the inventory) of Mike Fister's shoes, I would take a close look at EVE's possible fit into the Cadence juggernaut.
A few words from EVE
I have known Lauro Rizzati, Vice President of Worldwide Marketing and General Manager of EVE-USA, for years and thus had no trouble getting his views on the possible impact of the Synopsys acquisition of Synplicity's products and technology on his company. Here is our exchange.
Is there a "natural fit", as George Zafiropoulos, vice president of solutions marketing at Synopsys stated, between virtual platforms and FPGA-based prototyping solutions?
FPGA-based prototypes target real-time interface (protocols) validation and software development. In most cases, they map designs of less than 10-million ASIC equivalent gates. They are deployed either in stand-alone mode, driven by the embedded software stored in on-board memories, or in in-circuit emulation (ICE) mode driven by a target system. In ICE mode, some sort of hardware bridge must be created to adapt the fast clock frequencies of the target system with the slow clock frequencies of the design-under-test (DUT). Also, FPGA-based prototypes tend to be deployed late in the design cycle due to their long set up time.
The above scenario is quite different from the world of virtual prototyping, which tends to focus on early software development for large SoCs, simulated on a workstation. The chip sizes, the users and the goals differ.
The real synergy between virtual and physical prototyping happens when the software developer retains the same use model, and the physical prototype provides acceleration of RTL in a transparent mode. Technically, this means that the FPGA prototype needs extra layers of software and firmware, both in terms of automatic compilation flow and capability, to synchronize and interact with a workstation.
High-end and fast emulation solutions distinguish themselves from bare bones FPGA prototypes because they offer those extra layers that make the transition between virtual and physical possible and effortlessly.
At EVE, we think that there is a much bigger opportunity to introduce some continuity in the flow between ESL and RTL by progressively replacing the ESL models with emulated RTL. This approach is already in place at several large semiconductor/system companies, leading to shorter design cycles, and with an interesting collateral effect of reducing the needs for RTL simulation at system-level. EVE's ZeBu, for example, is already integrated with all the major virtual platform providers on the market.
Will designers have an advantage in obtaining a virtual platform solution and an FPGA-based prototyping solution from a single vendor?
At EVE we think that Synopsys would need to develop an efficient, fast and tight link to the software world and to drastically improve the set up time of its newly acquired FPGA prototyping solution. But, this is a long shot. It will require a significant investment from Synopsys, both in terms of time and of highly skilled human resources.
How many of your virtual platform customers go to FPGA implementation?
Most of our customers are using virtual platforms. For some applications, such as mobile phones, 90% of customers are using both virtual platforms and physical implementations of RTL, given the compulsory need to validate embedded software prior to tapeout. A tool such as ZeBu is typically used for debugging the (RTL) hardware, running the low-level software (OS, diagnostics, firmware, and so on) and, sometimes, the application software before tapeout. This is done while still providing the cycle accuracy missing in virtual platforms. That's the reason why we position ZeBu as a hardware/software co-verification tool. Virtual platforms are used even earlier in the design cycle (before RTL is ready) and/or for developing pure application software at lower cost.
Is this for production or prototyping purposes?
Virtual platforms are typically used to prototype high-end ASICs. FPGA designs are not complex yet. FPGAs offer a good level of flexibility. These are the reasons why we don't expect virtual platforms to be used for FPGA designs for a long while.
Obviously I did not expect Lauro to tell me that the world was falling all around him, but he also makes some good points and the bottom line is that Synopsys cannot take for granted the difficulty of integrating all aspects of Synplicity into its business model.