The EDA industry is in the process of changing from focusing mostly on technology leaders to providing support to hte majority of IC designers.
The four largest EDA companies have now all reported their financial results for their respective quarters. Only Synopsys had a positive result, while Cadence, Magma, and Mentor all reported losses. The obvious questions are: what are the causes, how deep will the losses go, and how long will the downturn last. Forecasting is usually a tricky business, but in this case, some properties of the near future behavior of the EDA industry are clearly visible. All that is required is a dispassionate reading of what the CEO of these companies are saying.
What they are saying
Aart de Geus, Chairman and CEO of Synopsys has proven to be an astute observer of our industry for many years. During the webcast announcing the results of his company he said: " The marketplace today is sending mixed signals. While chip volumes are increasing, ASP pressure has been tough on semiconductor growth. Lately, though, manufacturing capacity has begun to tighten up, and the first half semiconductor results came in better than many expected. In this uncertain landscape, we see some customers racing forward to gain market share, while others are holding back on their forward commitments. One common theme is caution and selectivity in choosing suppliers they can count on for the future."
Mike Fister, Chairman and CEO of Cadence, who had the dubious distinction of being the first one to report results noted that: ""Although we achieved our Q2 numbers, it was more difficult than we planned. Customers are demanding still more flexibility in when, what and how they purchase software and hardware."
Rajeev Madhavan, noted just yesterday that: "The first quarter proved to be a more difficult business environment than we anticipated, a situation that we believe may continue throughout at least a portion of the remainder of our fiscal year. Our key products and technology continue to deliver compelling solutions, but customers are experiencing softening demand in some of their end markets and we believe the first quarter results reflected delays in their purchases of design software as well as changes in our sales channel."
Only Wally Rhines, chairman and CEO of Mentor Graphics, was optimistic. He said that " Mentor Graphics continues to execute against its plan in an environment which remains challenging, Our young and innovative product portfolio has enabled Mentor Graphics to continue to perform as customers adopt new process nodes."
What does it mean
In order to understand the real meaning of the above observations, we need to take into consideration what the industry expectations have been for the last forty years. When Gordon Moore published his paper in 1965 predicting that the number of transistors on a silicon die would double every 18 months, he did not say for how long the trend would last. But the industry expected that the trend would continue forever. In the last couple of years, the pundits officially allowed that both the length of time required to double the number of transistors would be more than two years, and that there might in fact be an end to the trend due to physical limitations, since it is impossible to divide an atom in two while maintaining a non-explosive environment.
The prediction made in the International Technology Roadmap for Semiconductors, the bible of every EDA company, unfortunately continues to predict that the vast majority of semiconductors manufacturing will move to the new available node within two years of its introduction.
This is now proving incorrect, and thus demand for new tools is less than expected. Since new tools are the ones that demand the highest license prices, and thus produce the higher margin of profit, the EDA industry is facing a lower demand for its most profitable products. At the same time, each company is constrained to continue to invest in R&D in order to service those few customers that do need to take advantage of the latest available design and manufacturing capabilities.
Wally Rhines is the only one to choose to focus on customers adopting new process nodes. He has to. His largest revenue generator is Calibre and the family of products closely related to it. If people do not stay at the leading edge of manufacturing technology, Calibre revenues will suffer. It is not a coincidence that Joe Sawicki, Vice President and General Manger of the Design-to-Silicon division at Mentor, appearing on a panel at this year's DAC, confidently said that Moore's Law would continue at least until two more process nodes. And it will, for a handful of semiconductor companies, most of whom have their own internal semiconductor manufacturing capabilities.
The limiting factors
What are the factors that are slowing down the adoption of new manufacturing capabilities? They are both financial and technical.
It costs up to five billion dollars to build, equip, and ready a manufacturing facility capable of handling 45nm technology which is the process node leading companies are designing for today. Thus, semiconductors companies making this type of investment, must charge a commensurate price in order to recover their investments. So the cost of manufacturing a silicon die using today' s leading edge process is very high.
IC design companies divide the cost of a new product into two parts: non-recurring, and recurring. Recurring costs are those I just talked about: how much does it costs to produce one functioning IC. Non recurring costs are those incurred in the design and development of the product: and those costs are escalating due to the complexity not only of the contents of the IC, but of the physical characteristics the product must have in order to be manufacturable. Finally because the most promising sector of electronics product is the consumer market, the shelf life of a product is on the average less than one year. Since it is not uncommon to hear that a company must sell 100 million units to justify the investment of producing an IC using 65nm process technology, you can easily arrive at the conclusion that only a few companies can afford to take such risks.
Technically speaking producing a very complex IC challenges the limit of human intellectual capability. Hundred of million of transistors must work well in order to have a functional IC. Companies, aided by EDA vendors, have addressed the problem of complexity by increasing the level of abstraction engineers work at. This approach now faces two problems. First of all the manufacturability of an IC depends often on the details of how transistors are placed on the silicon, and the EDA tools that transform an algorithmic representation of a design into a circuit description that is manufacturable are either non-existent or not yet up to the task.
I do not want to put a limit to human ingenuity: we will solve the problem. But it will take much longer than expected, and in the mean time, EDA vendors will have to learn to make money from customers they use to consider "laggers" in adopting manufacturing technology. We need a new financial model for EDA vendors, and we must start from accepting reality, not abandoning ourselves to the belief that Moore's Law will live forever. The capability might live for a few more years, but the practicality of using it has seen its limit.
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